mibuild/platforms/versa: add rst_n

diff --git a/mibuild/platforms/versa.py b/mibuild/platforms/versa.py
index 66e176c8dbb607dd3f2f42271d0e38da6d23d111..1a240ace8ca2446e538241f411928c8806091894 100644 (file)
--- a/mibuild/platforms/versa.py
+++ b/mibuild/platforms/versa.py
@@ -7,6 +7,7 @@ from mibuild.lattice.programmer import LatticeProgrammer
 
 _io = [
        ("clk100", 0, Pins("L5"), IOStandard("LVDS25")),
+       ("rst_n", 0, Pins("A21"),IOStandard("LVCMOS33")),
 
        ("user_led", 0, Pins("Y20"), IOStandard("LVCMOS33")),
        ("user_led", 1, Pins("AA21"), IOStandard("LVCMOS33")),