i386.md (*movdfcc_1_rex64): Correct mode attribute.
authorUros Bizjak <uros@gcc.gnu.org>
Fri, 15 Oct 2010 21:13:24 +0000 (23:13 +0200)
committerUros Bizjak <uros@gcc.gnu.org>
Fri, 15 Oct 2010 21:13:24 +0000 (23:13 +0200)
* config/i386/i386.md (*movdfcc_1_rex64): Correct mode attribute.
(*movdfcc_1): ditto.

From-SVN: r165520

gcc/ChangeLog
gcc/config/i386/i386.md
gcc/testsuite/ChangeLog

index d702bf0775eeb241713769200391a6309552f18a..0d3d9b26ef3905b0c5754df3429085fc8281d7bf 100644 (file)
@@ -1,3 +1,8 @@
+2010-10-15  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (*movdfcc_1_rex64): Correct mode attribute.
+       (*movdfcc_1): ditto.
+
 2010-10-15  Joseph Myers  <joseph@codesourcery.com>
 
        * target.def (target_option.init_struct): New hook.
 2010-10-15  Richard Guenther  <rguenther@suse.de>
 
        PR lto/45957
-       * tree.c (free_lang_data_in_decl): Do not clear DECL_INITIAL
-       of vars.
+       * tree.c (free_lang_data_in_decl): Do not clear DECL_INITIAL of vars.
 
 2010-10-15  Chung-Lin Tang  <cltang@codesourcery.com>
 
        * cgraph.h (cgraph node): Enable former_clone_of unconditinally.
        * cgraphunit.c (verify_cgraph_node, cgraph_materialize_clone): Handle
        former_clone_of unconditionally.
-       
+
 2010-10-14  Iain Sandoe  <iains@gcc.gnu.org>
 
-       merge from FSF apple 'trunk' branch. 
+       merge from FSF apple 'trunk' branch.
        2006 Fariborz Jahanian <fjahanian@apple.com>
-       
+
        Radars 4436866, 4505126, 4506903, 4517826
        * c-parser.c (c_parser, objc_property_attr_context) New flag.
        (c_lex_one_token): Handle property attributes.
 2010-10-14  Jakub Jelinek  <jakub@redhat.com>
 
        PR tree-optimization/46008
-       * tree-if-conv.c (predicate_bbs): Try to canonicalize c2
-       if possible.
+       * tree-if-conv.c (predicate_bbs): Try to canonicalize c2 if possible.
 
 2010-10-14  Richard Guenther  <rguenther@suse.de>
 
        (lang_bitmap, struct outf, outf_p, header_file, oprintf)
        (get_output_file_with_visibility, srcdir, srcdir_len, do_dump):
        Moved from gengtype.c to here.
-       (do_debug, read_state_filename, write_state_filename): New
-       variables. (DBGPRINTF, DBGPRINT_COUNT_TYPE): New macros.
+       (do_debug, read_state_filename, write_state_filename): New variables.
+       (DBGPRINTF, DBGPRINT_COUNT_TYPE): New macros.
 
        * Makefile.in:
        (REVISION): Always defined.
 
 2010-10-14  Nathan Froyd  <froydnj@codesourcery.com>
 
-       * config.gcc (arm*-*-linux-*eabi) <tm_file>: Add bpabi.h from
-       libgcc.
+       * config.gcc (arm*-*-linux-*eabi) <tm_file>: Add bpabi.h from libgcc.
        (arm*-*-uclinux*eabi) <tm_file>: Likewise.
        (arm*-*-eabi*) <tm_file>: Likewise.
        (frv-*-elf) <tm_file>: Add frv-abi.h from libgcc.
        (gen_type_die_with_usage): Likewise.
        * sdbout.c (plain_type_1): Likewise.
        * tree.c (build_int_cst_wide): Likewise.
-       * gimple.c (gimple_types_compatible_p_1): NULLPTR_TYPE types
-       are equal.
+       * gimple.c (gimple_types_compatible_p_1): NULLPTR_TYPE types are equal.
 
 2010-10-14  Joseph Myers  <joseph@codesourcery.com>
 
        maybe_set_param_value.
        * opts.c (handle_param): Take opts and opts_set parameters.
        Update call to set_param_value.
-       (initial_min_crossjump_insns,
-       initial_max_fields_for_field_sensitive,
+       (initial_min_crossjump_insns, initial_max_fields_for_field_sensitive,
        initial_loop_invariant_max_bbs_in_loop): Remove.
        (init_options_once): Don't set them.
        (init_options_struct): Initialize parameters structures.
        (finish_options): Update calls to maybe_set_param_value.
        (common_handle_option): Update calls to handle_param and
        set_param_value.
-       * toplev.c (DEFPARAM): Update definition for changes to
-       param_info.
+       * toplev.c (DEFPARAM): Update definition for changes to param_info.
        (general_init): Call finish_params.
 
 2010-10-14  Nick Clifton  <nickc@redhat.com>
        (FIXED_REGISTERS, CALL_USED_REGISTERS): Update with CC_REG.
        (HARD_REGNO_MODE_OK): Call mn10300_hard_regno_mode_ok.
        (MODES_TIEABLE): Call mn10300_modes_tieable.
-       (REG_CLASS_NAMES, REG_CLASS_CONTENTS, REGNO_REG_CLASS): Add
-       CC_REGS.
+       (REG_CLASS_NAMES, REG_CLASS_CONTENTS, REGNO_REG_CLASS): Add CC_REGS.
        (LEGITIMATE_CONSTANT_P): Call mn10300_legitimate_constant_p.
        (CC_OVERFLOW_UNUSABLE, CC_NO_CARRY, NOTICE_UPDATE_CC)
        (SELECT_CC_MODE, REVERSIBLE_CC_MODE): Delete.
        called through for_each_rtx.
        (set_live_p): Adjust caller.
        (insn_live_p): Don't reset DEBUG_INSNs here.
-       (struct dead_debug_insn_data): New data. 
+       (struct dead_debug_insn_data): New data.
        (count_stores, is_dead_debug_insn, replace_dead_reg): New functions.
        (delete_trivially_dead_insns): If there is just one setter for the
        dead reg that is referenced by some DEBUG_INSNs, create a DEBUG_EXPR
        * config/i386/i386.c (ix86_builtins): Add
        IX86_BUILTIN_CPYSGNPS256 and IX86_BUILTIN_CPYSGNPD256.
        (bdesc_args): Likewise.
-       (ix86_builtin_vectorized_function): Support 
+       (ix86_builtin_vectorized_function): Support
        IX86_BUILTIN_CPYSGNPS256, IX86_BUILTIN_CPYSGNPD256,
        IX86_BUILTIN_SQRTPD256, IX86_BUILTIN_SQRTPS_NR256,
        and IX86_BUILTIN_CVTPS2DQ256.
 
 2010-10-12  Nathan Froyd  <froydnj@codesourcery.com>
 
-       * libgcc2.h: Use __SIZEOF_DOUBLE__ instead of
-       LIBGCC2_DOUBLE_TYPE_SIZE.
+       * libgcc2.h: Use __SIZEOF_DOUBLE__ instead of LIBGCC2_DOUBLE_TYPE_SIZE.
        (LIBGCC2_DOUBLE_TYPE_SIZE): Delete.
        * config/fixed-bit.h: Likewise.
        * config/rx/rx.h (LIBGCC2_DOUBLE_TYPE_SIZE): Delete.
        * config/arm/arm.h (ARM_EXPAND_ALIGNMENT): Rename from
        DATA_ALIGNMENT and add COND parameter. Update comments above.
        (DATA_ALIGNMENT): Use ARM_EXPAND_ALIGNMENT, with !optimize_size.
-       (LOCAL_ALIGNMENT): Use ARM_EXPAND_ALIGNMENT, with
-       !flag_conserve_stack.
+       (LOCAL_ALIGNMENT): Use ARM_EXPAND_ALIGNMENT, with !flag_conserve_stack.
 
 2010-10-12  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR bootstrap/45958
-       * exec-tool.in: Support '-plugin' as the second option to the
-       linker.
+       * exec-tool.in: Support '-plugin' as the second option to the linker.
 
 2010-10-12  Richard Henderson  <rth@redhat.com>
 
        (enum debug_info_type, enum debug_info_level, enum
        debug_info_usage, enum symbol_visibility, struct visibility_flags,
        enum ira_algorithm, enum ira_region, enum excess_precision, enum
-       graph_dump_types, enum stack_check_type, enum
-       warn_strict_overflow_code): Move to flag-types.h
+       graph_dump_types, enum stack_check_type,
+       enum warn_strict_overflow_code): Move to flag-types.h
        * opth-gen.awk: Include flag-types.h in options.h.
 
 2010-10-12  Jakub Jelinek  <jakub@redhat.com>
        (iterative_hash_rtx): New prototype.
        * rtl.c (iterative_hash_rtx): New function.
        * dwarf2out.c (dw_loc_list_node): Add hash and emitted fields.
-       (output_loc_list): Return immediately if emitted is set,
-       set it.
+       (output_loc_list): Return immediately if emitted is set, set it.
        (hash_loc_operands, hash_locs, hash_loc_list,
        compare_loc_operands, compare_locs, loc_list_hash, loc_list_eq,
        optimize_location_lists_1, optimize_location_lists): New function.
index d2ad8b19cd30283c8663873f653d2edbbe1433dc..0d3856efbeae27f588bb52ea8cfe12b41b21ee0e 100644 (file)
    || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
   "if (ix86_expand_fp_movcc (operands)) DONE; else FAIL;")
 
-(define_insn "*movsfcc_1_387"
-  [(set (match_operand:SF 0 "register_operand" "=f,f,r,r")
-       (if_then_else:SF (match_operator 1 "fcmov_comparison_operator"
+(define_insn "*movxfcc_1"
+  [(set (match_operand:XF 0 "register_operand" "=f,f")
+       (if_then_else:XF (match_operator 1 "fcmov_comparison_operator"
                                [(reg FLAGS_REG) (const_int 0)])
-                     (match_operand:SF 2 "nonimmediate_operand" "f,0,rm,0")
-                     (match_operand:SF 3 "nonimmediate_operand" "0,f,0,rm")))]
-  "TARGET_80387 && TARGET_CMOVE
+                     (match_operand:XF 2 "register_operand" "f,0")
+                     (match_operand:XF 3 "register_operand" "0,f")))]
+  "TARGET_80387 && TARGET_CMOVE"
+  "@
+   fcmov%F1\t{%2, %0|%0, %2}
+   fcmov%f1\t{%3, %0|%0, %3}"
+  [(set_attr "type" "fcmov")
+   (set_attr "mode" "XF")])
+
+(define_insn "*movdfcc_1_rex64"
+  [(set (match_operand:DF 0 "register_operand" "=f,f,r,r")
+       (if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
+                               [(reg FLAGS_REG) (const_int 0)])
+                     (match_operand:DF 2 "nonimmediate_operand" "f,0,rm,0")
+                     (match_operand:DF 3 "nonimmediate_operand" "0,f,0,rm")))]
+  "TARGET_64BIT && TARGET_80387 && TARGET_CMOVE
    && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
   "@
    fcmov%F1\t{%2, %0|%0, %2}
    cmov%O2%C1\t{%2, %0|%0, %2}
    cmov%O2%c1\t{%3, %0|%0, %3}"
   [(set_attr "type" "fcmov,fcmov,icmov,icmov")
-   (set_attr "mode" "SF,SF,SI,SI")])
+   (set_attr "mode" "DF,DF,DI,DI")])
 
 (define_insn "*movdfcc_1"
   [(set (match_operand:DF 0 "register_operand" "=f,f,&r,&r")
    #
    #"
   [(set_attr "type" "fcmov,fcmov,multi,multi")
-   (set_attr "mode" "DF")])
-
-(define_insn "*movdfcc_1_rex64"
-  [(set (match_operand:DF 0 "register_operand" "=f,f,r,r")
-       (if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
-                               [(reg FLAGS_REG) (const_int 0)])
-                     (match_operand:DF 2 "nonimmediate_operand" "f,0,rm,0")
-                     (match_operand:DF 3 "nonimmediate_operand" "0,f,0,rm")))]
-  "TARGET_64BIT && TARGET_80387 && TARGET_CMOVE
-   && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
-  "@
-   fcmov%F1\t{%2, %0|%0, %2}
-   fcmov%f1\t{%3, %0|%0, %3}
-   cmov%O2%C1\t{%2, %0|%0, %2}
-   cmov%O2%c1\t{%3, %0|%0, %3}"
-  [(set_attr "type" "fcmov,fcmov,icmov,icmov")
-   (set_attr "mode" "DF")])
+   (set_attr "mode" "DF,DF,DI,DI")])
 
 (define_split
   [(set (match_operand:DF 0 "register_and_not_any_fp_reg_operand" "")
   split_double_mode (DImode, &operands[0], 1, &operands[2], &operands[3]);
 })
 
-(define_insn "*movxfcc_1"
-  [(set (match_operand:XF 0 "register_operand" "=f,f")
-       (if_then_else:XF (match_operator 1 "fcmov_comparison_operator"
+(define_insn "*movsfcc_1_387"
+  [(set (match_operand:SF 0 "register_operand" "=f,f,r,r")
+       (if_then_else:SF (match_operator 1 "fcmov_comparison_operator"
                                [(reg FLAGS_REG) (const_int 0)])
-                     (match_operand:XF 2 "register_operand" "f,0")
-                     (match_operand:XF 3 "register_operand" "0,f")))]
-  "TARGET_80387 && TARGET_CMOVE"
+                     (match_operand:SF 2 "nonimmediate_operand" "f,0,rm,0")
+                     (match_operand:SF 3 "nonimmediate_operand" "0,f,0,rm")))]
+  "TARGET_80387 && TARGET_CMOVE
+   && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
   "@
    fcmov%F1\t{%2, %0|%0, %2}
-   fcmov%f1\t{%3, %0|%0, %3}"
-  [(set_attr "type" "fcmov")
-   (set_attr "mode" "XF")])
+   fcmov%f1\t{%3, %0|%0, %3}
+   cmov%O2%C1\t{%2, %0|%0, %2}
+   cmov%O2%c1\t{%3, %0|%0, %3}"
+  [(set_attr "type" "fcmov,fcmov,icmov,icmov")
+   (set_attr "mode" "SF,SF,SI,SI")])
 
 ;; All moves in XOP pcmov instructions are 128 bits and hence we restrict
 ;; the scalar versions to have only XMM registers as operands.
index f1469a2548381ae13d522c4027120e47d7ee091f..c61580225f3f5f983af8c220770faf1de23291e4 100644 (file)
@@ -30,8 +30,8 @@
 
 2010-10-15  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 
-       * g++.dg/torture/stackalign/eh-vararg-2.C: Fix dg-options for
-       arm-eabi targets.
+       * g++.dg/torture/stackalign/eh-vararg-2.C: Fix dg-options for
+       arm-eabi targets.
 
 2010-10-15  Chung-Lin Tang  <cltang@codesourcery.com>
 
@@ -65,9 +65,9 @@
        * obj-c++.dg/property/fsf-property-method-access.mm: New.
        * obj-c++.dg/property/fsf-property-named-ivar.mm: New.
 
-       merge from FSF apple 'trunk' branch. 
+       merge from FSF apple 'trunk' branch.
        2006 Fariborz Jahanian <fjahanian@apple.com>
-       
+
        Radars 4436866, 4505126, 4506903, 4517826
        * objc.dg/property/property-1.m: New.
        * objc.dg/property/property-2.m: New.
 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR middle-end/46011
-       * gcc.target/i386/vectorize4-avx.c: Scan 256bit AVX register
-       and xfail.
+       * gcc.target/i386/vectorize4-avx.c: Scan 256bit AVX register and xfail.
 
 2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>
 
-       * gcc.target/i386/recip-vec-sqrtf-avx.c: Scan 256bit AVX
-       register.
+       * gcc.target/i386/recip-vec-sqrtf-avx.c: Scan 256bit AVX register.
        * gcc.target/i386/recip-vec-divf-avx.c: Likewise.
 
 2010-10-14  Andrey Belevantsev  <abel@ispras.ru>
 2010-10-11  Nick Clifton  <nickc@redhat.com>
 
        * gcc.c-torture/compile/pr44197.c: Require visibility support.
-        Allow for a user label prefix.
+       Allow for a user label prefix.
 
 2010-10-10  Richard Guenther  <rguenther@suse.de>