Add expected state to case_extsb in alu_cases unit test

diff --git a/src/openpower/test/alu/alu_cases.py b/src/openpower/test/alu/alu_cases.py
index 2afff938e88eb5f2c21206d3a98b052f5c444c53..3bde8e27131d3e3dcde2a07d8e5d3b59ec086124 100644 (file)
--- a/src/openpower/test/alu/alu_cases.py
+++ b/src/openpower/test/alu/alu_cases.py
@@ -460,7 +460,32 @@ class ALUTestCase(TestAccumulatorBase):
             print(lst)
             initial_regs = [0] * 32
             initial_regs[1] = random.randint(0, (1 << 64)-1)
-            self.add_case(Program(lst, bigendian), initial_regs)
+
+            e = ExpectedState(pc=4)
+            e.intregs[1] = initial_regs[1]
+            if choice == "extsb":
+                s = ((initial_regs[1] & 0x1000_0000_0000_0080)>>7)&0x1
+                if s == 1:
+                    value = 0xffff_ffff_ffff_ff<<8
+                else:
+                    value = 0x0
+                e.intregs[3] = value | (initial_regs[1] & 0xff)
+            elif choice == "extsh":
+                s = ((initial_regs[1] & 0x1000_0000_0000_8000)>>15)&0x1
+                if s == 1:
+                    value = 0xffff_ffff_ffff<<16
+                else:
+                    value = 0x0
+                e.intregs[3] = value | (initial_regs[1] & 0xffff)
+            else:
+                s = ((initial_regs[1] & 0x1000_0000_8000_0000)>>31)&0x1
+                if s == 1:
+                    value = 0xffff_ffff<<32
+                else:
+                    value = 0x0
+                e.intregs[3] = value | (initial_regs[1] & 0xffff_ffff)
+
+            self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 
     def case_cmpeqb(self):
         lst = ["cmpeqb cr1, 1, 2"]