re PR target/12721 (ICE when building a cross compiler for avr-elf)

	PR target/12721.
	* config/avr/avr.c: Include ggc.h.
	(tmp_reg_rtx): Declare with GTY.
	(zero_reg_rtx): Likewise.
	(ldi_reg_rtx): Remove.
	(avr_override_options): Initialize zero_reg_rtx and
	ldi_reg_rtx.
	(avr_init): Remove.
	Include gt-avr.h.
	* config/avr/avr.h (LDI_REG_REGNO): Remove.
	Remove externs for tmp_reg_rtx, zero_reg_rtx, and ldi_reg_rtx.

From-SVN: r75010

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dfec5b95e86eb0299c72eec9b16dd6388ecc013c..da43b7a4dad58c844b495487be13ca97d610d803 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2003-12-24  Kazu Hirata  <kazu@cs.umass.edu>
+
+       PR target/12721.
+       * config/avr/avr.c: Include ggc.h.
+       (tmp_reg_rtx): Declare with GTY.
+       (zero_reg_rtx): Likewise.
+       (ldi_reg_rtx): Remove.
+       (avr_override_options): Initialize zero_reg_rtx and
+       ldi_reg_rtx.
+       (avr_init): Remove.
+       Include gt-avr.h.
+       * config/avr/avr.h (LDI_REG_REGNO): Remove.
+       Remove externs for tmp_reg_rtx, zero_reg_rtx, and ldi_reg_rtx.
+
 2003-12-24  David Edelsohn  <edelsohn@gnu.org>
 
        * doc/md.texi: Document PowerPC vector register constraint letter.

diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index a7a71871552c5ba0cdaf43e8b46a4843de7dc765..402cbca9b7381ba33b0e008a5d06776e5cfbdacd 100644 (file)
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -39,6 +39,7 @@
 #include "obstack.h"
 #include "function.h"
 #include "recog.h"
+#include "ggc.h"
 #include "tm_p.h"
 #include "target.h"
 #include "target-def.h"
@@ -81,14 +82,10 @@ static int avr_address_cost (rtx);
 #define FIRST_CUM_REG 26
 
 /* Temporary register RTX (gen_rtx (REG,QImode,TMP_REGNO)) */
-rtx tmp_reg_rtx;
+static GTY(()) rtx tmp_reg_rtx;
 
 /* Zeroed register RTX (gen_rtx (REG,QImode,ZERO_REGNO)) */
-rtx zero_reg_rtx;
-
-/* RTX for register which will be used for loading immediate values to
-   r0-r15 registers.  */
-rtx ldi_reg_rtx;
+static GTY(()) rtx zero_reg_rtx;
 
 /* AVR register names {"r0", "r1", ..., "r31"} */
 static const char *const avr_regnames[] = REGISTER_NAMES;
@@ -274,29 +271,10 @@ avr_override_options (void)
 
   if (optimize && !TARGET_NO_TABLEJUMP)
     avr_case_values_threshold = (!AVR_MEGA || TARGET_CALL_PROLOGUES) ? 8 : 17;
-}
 
-#if 0 /* Does not play nice with GC.  FIXME. */
-/* Initialize TMP_REG_RTX and ZERO_REG_RTX */
-void
-avr_init_once (void)
-{
-  tmp_reg_rtx = xcalloc (1, sizeof (struct rtx_def) + 1 * sizeof (rtunion));
-  PUT_CODE (tmp_reg_rtx, REG);
-  PUT_MODE (tmp_reg_rtx, QImode);
-  XINT (tmp_reg_rtx, 0) = TMP_REGNO;
-
-  zero_reg_rtx = xcalloc (1, sizeof (struct rtx_def) + 1 * sizeof (rtunion));
-  PUT_CODE (zero_reg_rtx, REG);
-  PUT_MODE (zero_reg_rtx, QImode);
-  XINT (zero_reg_rtx, 0) = ZERO_REGNO;
-
-  ldi_reg_rtx = xcalloc (1, sizeof (struct rtx_def) + 1 * sizeof (rtunion));
-  PUT_CODE (ldi_reg_rtx, REG);
-  PUT_MODE (ldi_reg_rtx, QImode);
-  XINT (ldi_reg_rtx, 0) = LDI_REG_REGNO;
+  tmp_reg_rtx  = gen_rtx_REG (QImode, TMP_REGNO);
+  zero_reg_rtx = gen_rtx_REG (QImode, ZERO_REGNO);
 }
-#endif
 
 /*  return register class from register number */
 
@@ -5389,3 +5367,4 @@ avr_asm_out_dtor (rtx symbol, int priority)
   default_dtor_section_asm_out_destructor (symbol, priority);
 }
 
+#include "gt-avr.h"

diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h
index 547e927f52fa24f68fadb1d6cabe3496245a3842..eae93e5e1c3ebf1f44ecaf4345a52d898a63a851 100644 (file)
--- a/gcc/config/avr/avr.h
+++ b/gcc/config/avr/avr.h
@@ -2482,11 +2482,4 @@ extern int avr_case_values_threshold;
 /* zero register r1 */
 #define ZERO_REGNO 1
 
-/* Temporary register which used for load immediate values to r0-r15  */
-#define LDI_REG_REGNO 31
-
-extern struct rtx_def *tmp_reg_rtx;
-extern struct rtx_def *zero_reg_rtx;
-extern struct rtx_def *ldi_reg_rtx;
-
 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG