cpu: Only check for PC events on instruction boundaries.

Only the instruction address is actually checked, so there's no need to check
repeatedly while we're working through the microops of a macroop and that's
not changing.

diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index f0566233c856e03285a3dd2684244b2de472ab01..bb2b1720911757f953db53ac16bc768a2f4b6b5d 100644 (file)
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1,4 +1,5 @@
 /*
+ * Copyright 2014 Google, Inc.
  * Copyright (c) 2010-2014 ARM Limited
  * All rights reserved
  *
@@ -1105,20 +1106,27 @@ DefaultCommit<Impl>::commitInsts()
                     }
                 }
 
-                int count = 0;
-                Addr oldpc;
-                // Debug statement.  Checks to make sure we're not
-                // currently updating state while handling PC events.
-                assert(!thread[tid]->noSquashFromTC && !thread[tid]->trapPending);
-                do {
-                    oldpc = pc[tid].instAddr();
-                    cpu->system->pcEventQueue.service(thread[tid]->getTC());
-                    count++;
-                } while (oldpc != pc[tid].instAddr());
-                if (count > 1) {
-                    DPRINTF(Commit,
-                            "PC skip function event, stopping commit\n");
-                    break;
+                bool onInstBoundary = !head_inst->isMicroop() ||
+                                      head_inst->isLastMicroop() ||
+                                      !head_inst->isDelayedCommit();
+
+                if (onInstBoundary) {
+                    int count = 0;
+                    Addr oldpc;
+                    // Make sure we're not currently updating state while
+                    // handling PC events.
+                    assert(!thread[tid]->noSquashFromTC &&
+                           !thread[tid]->trapPending);
+                    do {
+                        oldpc = pc[tid].instAddr();
+                        cpu->system->pcEventQueue.service(thread[tid]->getTC());
+                        count++;
+                    } while (oldpc != pc[tid].instAddr());
+                    if (count > 1) {
+                        DPRINTF(Commit,
+                                "PC skip function event, stopping commit\n");
+                        break;
+                    }
                 }
 
                 // Check if an instruction just enabled interrupts and we've
@@ -1128,9 +1136,8 @@ DefaultCommit<Impl>::commitInsts()
                 // case squash now to make sure the interrupt is handled.
                 //
                 // If we don't do this, we might end up in a live lock situation
-                if (!interrupt  && avoidQuiesceLiveLock &&
-                   (!head_inst->isMicroop() || head_inst->isLastMicroop()) &&
-                   cpu->checkInterrupts(cpu->tcBase(0)))
+                if (!interrupt && avoidQuiesceLiveLock &&
+                    onInstBoundary && cpu->checkInterrupts(cpu->tcBase(0)))
                     squashAfter(tid, head_inst);
             } else {
                 DPRINTF(Commit, "Unable to commit head instruction PC:%s "

diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 8dcae01c560a92b18f8cc0f6b334d1ac1ebf606f..aeaebcdb848330db63a236e7dd450e472b7a02b4 100644 (file)
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -1,4 +1,5 @@
 /*
+ * Copyright 2014 Google, Inc.
  * Copyright (c) 2012-2013 ARM Limited
  * All rights reserved.
  *
@@ -518,10 +519,11 @@ AtomicSimpleCPU::tick()
         numCycles++;
         ppCycles->notify(1);
 
-        if (!curStaticInst || !curStaticInst->isDelayedCommit())
+        if (!curStaticInst || !curStaticInst->isDelayedCommit()) {
             checkForInterrupts();
+            checkPcEventQueue();
+        }
 
-        checkPcEventQueue();
         // We must have just got suspended by a PC event
         if (_status == Idle) {
             tryCompleteDrain();

diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index c2bcdee6318a572ed13b5679a14229235b34cb15..c7db5c4f867e100ea20a348b9359a6178dd42539 100644 (file)
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -1,4 +1,5 @@
 /*
+ * Copyright 2014 Google, Inc.
  * Copyright (c) 2010-2013 ARM Limited
  * All rights reserved
  *
@@ -551,10 +552,10 @@ TimingSimpleCPU::fetch()
 {
     DPRINTF(SimpleCPU, "Fetch\n");
 
-    if (!curStaticInst || !curStaticInst->isDelayedCommit())
+    if (!curStaticInst || !curStaticInst->isDelayedCommit()) {
         checkForInterrupts();
-
-    checkPcEventQueue();
+        checkPcEventQueue();
+    }
 
     // We must have just got suspended by a PC event
     if (_status == Idle)