+2017-09-04 Yao Qi <yao.qi@linaro.org>
+
+ * i386-go32-tdep.c: Include x86-xstate.h.
+ (i386_go32_init_abi): Call i386_target_description.
+ * i386-tdep.c (i386_target_description): Return tdesc_i386_mmx
+ if xcr0 is X86_XSTATE_X87_MASK.
+ * i386-tdep.h (tdesc_i386): Remove the declaration.
+ (tdesc_i386_mmx): Likewise.
+
2017-09-04 Yao Qi <yao.qi@linaro.org>
* i386-fbsd-tdep.c (i386fbsd_core_read_xcr0): Return
#include "defs.h"
#include "i386-tdep.h"
+#include "x86-xstate.h"
#include "target-descriptions.h"
#include "osabi.h"
/* DJGPP does not support the SSE registers. */
if (!tdesc_has_registers (info.target_desc))
- tdep->tdesc = tdesc_i386_mmx;
+ tdep->tdesc = i386_target_description (X86_XSTATE_X87_MASK);
/* Native compiler is GCC, which uses the SVR4 register numbering
even in COFF and STABS. See the comment in i386_gdbarch_init,
return tdesc_i386_mpx;
case X86_XSTATE_AVX_MASK:
return tdesc_i386_avx;
+ case X86_XSTATE_SSE_MASK:
+ return tdesc_i386;
+ case X86_XSTATE_X87_MASK:
+ return tdesc_i386_mmx;
default:
return tdesc_i386;
}
/* Size of the largest register. */
#define I386_MAX_REGISTER_SIZE 64
-extern struct target_desc *tdesc_i386;
-extern struct target_desc *tdesc_i386_mmx;
-
/* Types for i386-specific registers. */
extern struct type *i387_ext_type (struct gdbarch *gdbarch);