Add missing mapping between HAS and USE for Liteeth and Tercel on Arctic Tern

diff --git a/fpga/top-rcs-arctic-tern-bmc-card.vhdl b/fpga/top-rcs-arctic-tern-bmc-card.vhdl
index f441cac403b64577d87fdfc9575e347205f26d0f..3b02aa3888c4fde6b057597fdf39f44e529b57bc 100644 (file)
--- a/fpga/top-rcs-arctic-tern-bmc-card.vhdl
+++ b/fpga/top-rcs-arctic-tern-bmc-card.vhdl
@@ -169,6 +169,8 @@ begin
             SPI_FLASH_DEF_CKDV => SPI_FLASH_DEF_CKDV,
             SPI_FLASH_DEF_QUAD => SPI_FLASH_DEF_QUAD,
             LOG_LENGTH         => LOG_LENGTH,
+            HAS_LITEETH        => USE_LITEETH,
+            HAS_TERCEL         => USE_TERCEL,
             UART0_IS_16550     => UART_IS_16550,
             HAS_UART1          => HAS_UART1,
             ICACHE_NUM_LINES   => ICACHE_NUM_LINES