i965g: turn on texture tiling by default

diff --git a/src/gallium/drivers/i965/brw_screen.c b/src/gallium/drivers/i965/brw_screen.c
index 70e2d9c47a371e60cff5f73cec6e1f3023f5288a..1855e4fd45f397fa4d4bbc5546b640caba13e1dd 100644 (file)
--- a/src/gallium/drivers/i965/brw_screen.c
+++ b/src/gallium/drivers/i965/brw_screen.c
@@ -396,5 +396,8 @@ brw_create_screen(struct brw_winsys_screen *sws, uint pci_id)
    brw_screen_tex_surface_init(bscreen);
    brw_screen_buffer_init(bscreen);
 
+   bscreen->no_tiling = debug_get_option("BRW_NO_TILING", FALSE);
+   
+   
    return &bscreen->base;
 }

diff --git a/src/gallium/drivers/i965/brw_screen.h b/src/gallium/drivers/i965/brw_screen.h
index ab811e48fcae6083692ef87b1e5c064eacf7f067..7226d9228b7828b62942e36f80ea14e420e6dcce 100644 (file)
--- a/src/gallium/drivers/i965/brw_screen.h
+++ b/src/gallium/drivers/i965/brw_screen.h
@@ -45,6 +45,7 @@ struct brw_screen
    struct pipe_screen base;
    struct brw_chipset chipset;
    struct brw_winsys_screen *sws;
+   boolean no_tiling;
 };
 
 /**

diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c
index 650cac240bb15a3eda16fcdbda6cb88cd87c75a5..f4c20f31a53b3f11963242fc9154d57019375014 100644 (file)
--- a/src/gallium/drivers/i965/brw_screen_texture.c
+++ b/src/gallium/drivers/i965/brw_screen_texture.c
@@ -209,14 +209,11 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen,
 
    /* XXX: No tiling with compressed textures??
     */
-   if (tex->compressed == 0 
-       /* && bscreen->use_texture_tiling */
-       /* && bscreen->kernel_exec_fencing */) 
+   if (tex->compressed == 0 &&
+       !bscreen->no_tiling) 
    {
-      if (1)
-         tex->tiling = BRW_TILING_NONE;
-      else if (bscreen->chipset.is_965 &&
-               pf_is_depth_or_stencil(templ->format))
+      if (bscreen->chipset.is_965 &&
+         pf_is_depth_or_stencil(templ->format))
         tex->tiling = BRW_TILING_Y;
       else
         tex->tiling = BRW_TILING_X;