radv/ac: Implement Float64 UBO loads.
authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Sun, 8 Jan 2017 00:36:30 +0000 (01:36 +0100)
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Wed, 1 Feb 2017 00:09:29 +0000 (01:09 +0100)
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
src/amd/common/ac_nir_to_llvm.c

index 4367cd1bb6bf4890378260b9c2e7e1a049a08bef..c50292e765fd293c267af955a4194ee5597382f3 100644 (file)
@@ -2185,13 +2185,17 @@ static LLVMValueRef visit_load_buffer(struct nir_to_llvm_context *ctx,
 static LLVMValueRef visit_load_ubo_buffer(struct nir_to_llvm_context *ctx,
                                           nir_intrinsic_instr *instr)
 {
-       LLVMValueRef results[4], ret;
+       LLVMValueRef results[8], ret;
        LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
        LLVMValueRef offset = get_src(ctx, instr->src[1]);
+       int num_components = instr->num_components;
 
        rsrc = LLVMBuildBitCast(ctx->builder, rsrc, LLVMVectorType(ctx->i8, 16), "");
 
-       for (unsigned i = 0; i < instr->num_components; ++i) {
+       if (instr->dest.ssa.bit_size == 64)
+               num_components *= 2;
+
+       for (unsigned i = 0; i < num_components; ++i) {
                LLVMValueRef params[] = {
                        rsrc,
                        LLVMBuildAdd(ctx->builder, LLVMConstInt(ctx->i32, 4 * i, 0),