Merge pull request #1180 from YosysHQ/eddie/no_abc9_retime

Error out if -abc9 and -retime specified

diff --cc techlibs/xilinx/synth_xilinx.cc
index ef7660288af96dfab454482bfa131699e029ae5f,22c4a1a1b90c63cdd36f38a2f0dae1d69fb35ffb..77daa745c8672f39cf2304988c9bc65a119049b4
--- 1/techlibs/xilinx/synth_xilinx.cc
--- 2/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@@ -207,11 -195,8 +207,11 @@@ struct SynthXilinxPass : public ScriptP
                extra_args(args, argidx, design);
  
                if (family != "xcup" && family != "xcu" && family != "xc7" && family != "xc6s")
-                       log_cmd_error("Invalid Xilinx -family setting: %s\n", family.c_str());
+                       log_cmd_error("Invalid Xilinx -family setting: '%s'.\n", family.c_str());
  
 +              if (widemux != 0 && widemux < 2)
 +                      log_cmd_error("-widemux value must be 0 or >= 2.\n");
 +
                if (!design->full_selection())
                        log_cmd_error("This command only operates on fully selected designs!\n");