# Branch-Conditional
-[[sv/branches]]
+[[sv/branches]] are a very special exception to the rule that the
+Scalar instruction shall not be modified. This because of the tight
+integration with looping and the application of Boolean Logic
+manipulation needed for Parallel operations (predicate mask usage).
+
+One key difference is that LR is only updated if certain additional
+conditions are met, whereas Scalar `bclrl` for example unconditionally
+overwrites LR.
+
+Well over 500 Vectorised branch instructions exist in SVP64 due to the
+number of options available: close integration and interaction with
+the base Scalar Branch was unavoidable.