radeonsi: Disable operations that do not work with DCC.
authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tue, 20 Oct 2015 22:10:37 +0000 (00:10 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Fri, 23 Oct 2015 22:42:24 +0000 (00:42 +0200)
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/drivers/radeon/r600_texture.c
src/gallium/drivers/radeonsi/cik_sdma.c
src/gallium/drivers/radeonsi/si_blit.c
src/gallium/drivers/radeonsi/si_dma.c

index fffb9ef4cbe3dcf239ce4e673437be503edefd18..c2a692c9af16771c4a72a985df4df79b17b89ece 100644 (file)
@@ -1290,6 +1290,11 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
                        continue;
                }
 
+               /* CMASK clear does not work for DCC compressed textures */
+               if (tex->surface.dcc_enabled) {
+                       continue;
+               }
+
                /* ensure CMASK is enabled */
                r600_texture_alloc_cmask_separate(rctx->screen, tex);
                if (tex->cmask.size == 0) {
index 6454b8ce8c045df9161f67c96eeac65f1a939c9d..25fd09a472525a0ca2e9789098106d819a0d3d13 100644 (file)
@@ -242,7 +242,8 @@ void cik_sdma_copy(struct pipe_context *ctx,
 
        if (src->format != dst->format ||
            rdst->surface.nsamples > 1 || rsrc->surface.nsamples > 1 ||
-           (rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level)) {
+           (rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level) ||
+           rdst->surface.dcc_enabled || rsrc->surface.dcc_enabled) {
                goto fallback;
        }
 
index aa526ee720e5560c3945541030c92bada473acdb..ab2523a24b7eeba0581a37a992e5c9b00633d49a 100644 (file)
@@ -675,7 +675,8 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
            info->src.box.depth == 1 &&
            dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
            !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
-           (!dst->cmask.size || !dst->dirty_level_mask) /* dst cannot be fast-cleared */) {
+           (!dst->cmask.size || !dst->dirty_level_mask) && /* dst cannot be fast-cleared */
+           !dst->surface.dcc_enabled) {
                si_blitter_begin(ctx, SI_COLOR_RESOLVE |
                                 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
                util_blitter_custom_resolve_color(sctx->blitter,
index 31b0b41e5a41c002192834be12bf164422097bd8..73c026cc0cdd63f110817e621f4f8763a8e16c45 100644 (file)
@@ -248,7 +248,8 @@ void si_dma_copy(struct pipe_context *ctx,
        if (src->format != dst->format || src_box->depth > 1 ||
            (rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level) ||
            rdst->cmask.size || rdst->fmask.size ||
-           rsrc->cmask.size || rsrc->fmask.size) {
+           rsrc->cmask.size || rsrc->fmask.size ||
+           rdst->surface.dcc_enabled || rsrc->surface.dcc_enabled) {
                goto fallback;
        }