a new address, so as not to reuse a previous, non-related reloc.
* gas/arm/arm-it-auto.d, gas/arm/bl-local-v4t.d,
gas/arm/blx-local.d, gas/arm/thumb-w-good.d: Update expected
results.
+2010-02-08 Christophe Lyon <christophe.lyon@st.com>
+
+ * objdump.c (disassemble_bytes): Clear aux->reloc before printing
+ a new address, so as not to reuse a previous, non-related reloc.
+
2010-02-02 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (get_note_type): Handle NT_X86_XSTATE.
previous_octets = octets;
octets = 0;
+ /* Make sure we don't use relocs from previous instructions. */
+ aux->reloc = NULL;
+
/* If we see more than SKIP_ZEROES octets of zeroes, we just
print `...'. */
for (z = addr_offset * opb; z < stop_offset * opb; z++)
inf->flags |= INSN_HAS_RELOC;
aux->reloc = **relppp;
}
- else
- aux->reloc = NULL;
}
octets = (*disassemble_fn) (section->vma + addr_offset, inf);
+2010-02-08 Christophe Lyon <christophe.lyon@st.com>
+
+ * gas/arm/arm-it-auto.d: Update expected results.
+ * gas/arm/bl-local-v4t.d: Likewise.
+ * gas/arm/blx-local.d: Likewise.
+ * gas/arm/thumb-w-good.d: Likewise.
+ * gas/arm/wince.d: Likewise.
+
2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
0000008c <main\+0x8c> bf18 it ne
0000008e <main\+0x8e> 200d movne r0, #13
00000090 <main\+0x90> f... f... bl 0000000. <f.*>
-00000094 <f\+0x94> bd10 pop {r4, pc}
-00000096 <f\+0x96> f... f... bl 0000000. <f.*>
-0000009a <f\+0x9a> bfb8 it lt
-0000009c <f\+0x9c> 2000 movlt r0, #0
-0000009e <f\+0x9e> 4348 muls r0, r1
-000000a0 <f\+0xa0> bfb8 it lt
-000000a2 <f\+0xa2> 2000 movlt r0, #0
-000000a4 <f\+0xa4> 4348 muls r0, r1
+00000094 <main\+0x94> bd10 pop {r4, pc}
+00000096 <main\+0x96> f... f... bl 0000000. <f.*>
+0000009a <main\+0x9a> bfb8 it lt
+0000009c <main\+0x9c> 2000 movlt r0, #0
+0000009e <main\+0x9e> 4348 muls r0, r1
+000000a0 <main\+0xa0> bfb8 it lt
+000000a2 <main\+0xa2> 2000 movlt r0, #0
+000000a4 <main\+0xa4> 4348 muls r0, r1
.*: +file format .*arm.*
Disassembly of section .text:
0+00 <[^>]*> f7ff fffe bl 00+18 <[^>]*> 0: R_ARM_THM_CALL foo2
-0+1c <[^>]*> d004 beq.n 00+28 <[^>]*>
-0+1e <[^>]*> e003 b.n 00+28 <[^>]*>
-0+20 <[^>]*> f000 f808 bl 00+34 <[^>]*>
-0+24 <[^>]*> f000 f802 bl 00+2c <[^>]*>
-0+28 <[^>]*> 46c0 nop ; \(mov r8, r8\)
-0+2a <[^>]*> 46c0 nop ; \(mov r8, r8\)
-0+2c <[^>]*> 46c0 nop ; \(mov r8, r8\)
+0+04 <[^>]*> d004 beq.n 00+10 <[^>]*>
+0+06 <[^>]*> e003 b.n 00+10 <[^>]*>
+0+08 <[^>]*> f000 f808 bl 00+1c <[^>]*>
+0+0c <[^>]*> f000 f802 bl 00+14 <[^>]*>
+0+10 <[^>]*> 46c0 nop ; \(mov r8, r8\)
+0+12 <[^>]*> 46c0 nop ; \(mov r8, r8\)
+0+14 <[^>]*> 46c0 nop ; \(mov r8, r8\)
...
-0+30 <[^>]*> e1a00000 nop ; \(mov r0, r0\)
-0+34 <[^>]*> e1a00000 nop ; \(mov r0, r0\)
+0+18 <[^>]*> e1a00000 nop ; \(mov r0, r0\)
+0+1c <[^>]*> e1a00000 nop ; \(mov r0, r0\)
0+2c <[^>]*> 0afffffc beq 00000024 <fooundefthumb>
0+30 <[^>]*> eafffffb b 00000024 <fooundefthumb>
0+34 <[^>]*> 0bfffffe bleq 00000020 <foo> 34: R_ARM_JUMP24 foo
-0+58 <[^>]*> 0afffffe beq 00000020 <foo> 38: R_ARM_JUMP24 foo
-0+5c <[^>]*> eafffffe b 00000020 <foo> 3c: R_ARM_JUMP24 foo
-0+60 <[^>]*> e1a00000 nop ; \(mov r0, r0\)
-0+64 <[^>]*> e1a00000 nop ; \(mov r0, r0\)
+0+38 <[^>]*> 0afffffe beq 00000020 <foo> 38: R_ARM_JUMP24 foo
+0+3c <[^>]*> eafffffe b 00000020 <foo> 3c: R_ARM_JUMP24 foo
+0+40 <[^>]*> e1a00000 nop ; \(mov r0, r0\)
+0+44 <[^>]*> e1a00000 nop ; \(mov r0, r0\)
Disassembly of section .text:
00000000 <.text> f7ff fffe bl 00000000 <foo>
-00000004 <foo\+0x4> f3ef 8000 mrs r0, CPSR
+00000004 <.text\+0x4> f3ef 8000 mrs r0, CPSR
0: ARM_32 global_data
0+004 <global_sym> e1a00000 nop ; \(mov r0, r0\)
0+008 <global_sym\+0x4> e1a00000 nop ; \(mov r0, r0\)
-0+000c <global_sym\+0x8> e1a00000 nop ; \(mov r0, r0\)
+0+00c <global_sym\+0x8> e1a00000 nop ; \(mov r0, r0\)
0+010 <global_sym\+0xc> eafffffb b f+ff8 <global_sym\+0xf+ff4>
10: ARM_26D global_sym\+0xf+ffc
-0+018 <global_sym\+0x14> ebfffffa bl f+ff4 <global_sym\+0xf+ff0>
+0+014 <global_sym\+0x10> ebfffffa bl f+ff4 <global_sym\+0xf+ff0>
14: ARM_26D global_sym\+0xf+ffc
-0+01c <global_sym\+0x18> 0afffff9 beq f+ff0 <global_sym\+0xf+fec>
+0+018 <global_sym\+0x14> 0afffff9 beq f+ff0 <global_sym\+0xf+fec>
18: ARM_26D global_sym\+0xf+ffc
-0+020 <global_sym\+0x1c> eafffff8 b 0+008 <global_sym\+0x4>
-0+024 <global_sym\+0x20> ebfffff7 bl 0+008 <global_sym\+0x4>
-0+028 <global_sym\+0x24> 0afffff6 beq 0+008 <global_sym\+0x4>
-0+02c <global_sym\+0x28> eafffff5 b 0+008 <global_sym\+0x4>
-0+030 <global_sym\+0x2c> ebfffff4 bl 0+008 <global_sym\+0x4>
-0+034 <global_sym\+0x30> e51f0034 ldr r0, \[pc, #-52\] ; 0+008 <global_sym\+0x4>
-0+038 <global_sym\+0x34> e51f0038 ldr r0, \[pc, #-56\] ; 0+008 <global_sym\+0x4>
-0+03c <global_sym\+0x38> e51f003c ldr r0, \[pc, #-60\] ; 0+008 <global_sym\+0x4>
+0+01c <global_sym\+0x18> eafffff8 b 0+004 <global_sym>
+0+020 <global_sym\+0x1c> ebfffff7 bl 0+004 <global_sym>
+0+024 <global_sym\+0x20> 0afffff6 beq 0+004 <global_sym>
+0+028 <global_sym\+0x24> eafffff5 b 0+004 <global_sym>
+0+02c <global_sym\+0x28> ebfffff4 bl 0+004 <global_sym>
+0+030 <global_sym\+0x2c> e51f0034 ldr r0, \[pc, #-52\] ; 0+004 <global_sym>
+0+034 <global_sym\+0x30> e51f0038 ldr r0, \[pc, #-56\] ; 0+004 <global_sym>
+0+038 <global_sym\+0x34> e51f003c ldr r0, \[pc, #-60\] ; 0+004 <global_sym>