Add support for the MIPS P5600 family of CPUs.

ChangeLog:

2014-04-10  Andrew Bennett  <andrew.bennett@imgtec.com>

	* config/tc-mips.c (mips_cpu_info_table): Add P5600
	configuation.
	* doc/c-mips.texi: Document p5600.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 62f5138d1a4b274421fc4e6788d35db3cffae45e..326b47cc46c23bb8a8ea750b8519b67563eebef1 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2014-04-10  Andrew Bennett  <andrew.bennett@imgtec.com>
+
+       * config/tc-mips.c (mips_cpu_info_table): Add P5600
+       configuation.
+       * doc/c-mips.texi: Document p5600.
+
 2014-04-09  Nick Clifton  <nickc@redhat.com>
 
        * config/tc-rl78.h (TC_CONS_FIX_NEW): Add RELOC parameter.

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 318b0b56cff796506e595989e4029801ca25fd2a..47de8d386928588fb6309131352f1ba96ca02549 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -17902,6 +17902,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   { "1004kf2_1",      0, ASE_DSP | ASE_MT,     ISA_MIPS32R2, CPU_MIPS32R2 },
   { "1004kf",         0, ASE_DSP | ASE_MT,     ISA_MIPS32R2, CPU_MIPS32R2 },
   { "1004kf1_1",      0, ASE_DSP | ASE_MT,     ISA_MIPS32R2, CPU_MIPS32R2 },
+  /* P5600 with EVA and Virtualization ASEs, other ASEs are optional.  */
+  { "p5600",          0, ASE_VIRT | ASE_EVA,   ISA_MIPS32R2, CPU_MIPS32R2 },
 
   /* MIPS 64 */
   { "5kc",            0, 0,                    ISA_MIPS64,   CPU_MIPS64 },

diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 184915e35030fb94a45c7b585a593806d812bb82..3778ae203ea5b1d719933900cf34deae9045dc3d 100644 (file)
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -337,6 +337,7 @@ m14kec,
 1004kf2_1,
 1004kf,
 1004kf1_1,
+p5600,
 5kc,
 5kf,
 20kc,