fix fmadds/fmsubs FPMULADD32 helper
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 16 Jun 2021 18:58:37 +0000 (19:58 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 16 Jun 2021 18:58:37 +0000 (19:58 +0100)
src/openpower/decoder/helpers.py

index 8b849fb89588391e75d626df376be821bc85c4ea..134ef84af8f67c018274a17f2cbe409a15302649 100644 (file)
@@ -295,15 +295,17 @@ def FPMULADD32(FRA, FRC, FRB, addsign, mulsign):
     #FRA = DOUBLE(SINGLE(FRA))
     #FRB = DOUBLE(SINGLE(FRB))
     if addsign == 1:
-        result = float(FRB)
+        if mulsign == 1:
+            result = float(FRA) * float(FRC) + float(FRB) # fmadds
+        elif mulsign == -1:
+            result = -(float(FRA) * float(FRC) + float(FRB))  # fnmadds
     elif addsign == -1:
-        result = -float(FRB)
+        if mulsign == 1:
+            result = float(FRA) * float(FRC) - float(FRB) # fmsubs
+        elif mulsign == -1:
+            result = -(float(FRA) * float(FRC) - float(FRB))  # fnmsubs
     elif addsign == 0:
         result = 0.0
-    if mulsign == 1:
-        result += float(FRA) * float(FRC)
-    elif mulsign == -1:
-        result -= float(FRA) * float(FRC)
     log ("FPMULADD32", FRA, FRB, FRC,
                        float(FRA), float(FRB), float(FRC),
                        result)