freedreno: Refactor the UBWC flags registers emission.

It's the same logic for each of these being emitted, and I was about to
change the rsc->layout.* for UBWC.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index 6dd482ca2f3f694eea784a9f268373dfba216221..f555e294e45675beee5bc37ef3d25265ac4c36ff 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -35,6 +35,7 @@
 #include "fd6_blitter.h"
 #include "fd6_format.h"
 #include "fd6_emit.h"
+#include "fd6_resource.h"
 
 /* Make sure none of the requested dimensions extend beyond the size of the
  * resource.  Not entirely sure why this happens, but sometimes it does, and
@@ -499,8 +500,6 @@ emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
        for (unsigned i = 0; i < info->dst.box.depth; i++) {
                unsigned soff = fd_resource_offset(src, info->src.level, sbox->z + i);
                unsigned doff = fd_resource_offset(dst, info->dst.level, dbox->z + i);
-               unsigned subwcoff = fd_resource_ubwc_offset(src, info->src.level, sbox->z + i);
-               unsigned dubwcoff = fd_resource_ubwc_offset(dst, info->dst.level, dbox->z + i);
                bool subwc_enabled = fd_resource_ubwc_enabled(src, info->src.level);
                bool dubwc_enabled = fd_resource_ubwc_enabled(dst, info->dst.level);
 
@@ -536,9 +535,7 @@ emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
 
                if (subwc_enabled) {
                        OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_FLAGS_LO, 6);
-                       OUT_RELOC(ring, src->bo, subwcoff, 0, 0);
-                       OUT_RING(ring, A6XX_SP_PS_2D_SRC_FLAGS_PITCH_PITCH(src->layout.ubwc_pitch) |
-                                        A6XX_SP_PS_2D_SRC_FLAGS_PITCH_ARRAY_PITCH(src->layout.ubwc_size));
+                       fd6_emit_flag_reference(ring, src, info->src.level, sbox->z + i);
                        OUT_RING(ring, 0x00000000);
                        OUT_RING(ring, 0x00000000);
                        OUT_RING(ring, 0x00000000);
@@ -562,9 +559,7 @@ emit_blit_or_clear_texture(struct fd_context *ctx, struct fd_ringbuffer *ring,
 
                if (dubwc_enabled) {
                        OUT_PKT4(ring, REG_A6XX_RB_2D_DST_FLAGS_LO, 6);
-                       OUT_RELOCW(ring, dst->bo, dubwcoff, 0, 0);
-                       OUT_RING(ring, A6XX_RB_2D_DST_FLAGS_PITCH_PITCH(dst->layout.ubwc_pitch) |
-                                        A6XX_RB_2D_DST_FLAGS_PITCH_ARRAY_PITCH(dst->layout.ubwc_size));
+                       fd6_emit_flag_reference(ring, dst, info->dst.level, dbox->z + i);
                        OUT_RING(ring, 0x00000000);
                        OUT_RING(ring, 0x00000000);
                        OUT_RING(ring, 0x00000000);

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index 0176402ad87e7834efee9f64c2e1392d50ad5d2d..35199aea99a483579dcb5e73a9699139e46bab2c 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -44,11 +44,32 @@
 #include "fd6_emit.h"
 #include "fd6_program.h"
 #include "fd6_format.h"
+#include "fd6_resource.h"
 #include "fd6_zsa.h"
 
 /* some bits in common w/ a4xx: */
 #include "a4xx/fd4_draw.h"
 
+/**
+ * Emits the flags registers, suitable for RB_MRT_FLAG_BUFFER,
+ * RB_DEPTH_FLAG_BUFFER, SP_PS_2D_SRC_FLAGS, and RB_BLIT_FLAG_DST.
+ */
+void
+fd6_emit_flag_reference(struct fd_ringbuffer *ring, struct fd_resource *rsc,
+               int level, int layer)
+{
+       if (fd_resource_ubwc_enabled(rsc, level)) {
+               OUT_RELOCW(ring, rsc->bo, fd_resource_ubwc_offset(rsc, level, layer), 0, 0);
+               OUT_RING(ring,
+                               A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(rsc->layout.ubwc_pitch) |
+                               A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(rsc->layout.ubwc_size));
+       } else {
+               OUT_RING(ring, 0x00000000);    /* RB_MRT_FLAG_BUFFER[i].ADDR_LO */
+               OUT_RING(ring, 0x00000000);    /* RB_MRT_FLAG_BUFFER[i].ADDR_HI */
+               OUT_RING(ring, 0x00000000);
+       }
+}
+
 static void
 emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb,
                struct fd_gmem_stateobj *gmem)
@@ -67,9 +88,8 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb,
                struct fd_resource *rsc = NULL;
                struct fdl_slice *slice = NULL;
                uint32_t stride = 0;
-               uint32_t offset, ubwc_offset;
+               uint32_t offset;
                uint32_t tile_mode;
-               bool ubwc_enabled;
 
                if (!pfb->cbufs[i])
                        continue;
@@ -93,9 +113,6 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb,
 
                offset = fd_resource_offset(rsc, psurf->u.tex.level,
                                psurf->u.tex.first_layer);
-               ubwc_offset = fd_resource_ubwc_offset(rsc, psurf->u.tex.level,
-                               psurf->u.tex.first_layer);
-               ubwc_enabled = fd_resource_ubwc_enabled(rsc, psurf->u.tex.level);
 
                stride = slice->pitch * rsc->layout.cpp * pfb->samples;
                swap = rsc->layout.tile_mode ? WZYX : fd6_pipe2swap(pformat);
@@ -132,15 +149,8 @@ emit_mrt(struct fd_ringbuffer *ring, struct pipe_framebuffer_state *pfb,
                                COND(uint, A6XX_SP_FS_MRT_REG_COLOR_UINT));
 
                OUT_PKT4(ring, REG_A6XX_RB_MRT_FLAG_BUFFER(i), 3);
-               if (ubwc_enabled) {
-                       OUT_RELOCW(ring, rsc->bo, ubwc_offset, 0, 0);   /* BASE_LO/HI */
-                       OUT_RING(ring, A6XX_RB_MRT_FLAG_BUFFER_PITCH_PITCH(rsc->layout.ubwc_pitch) |
-                               A6XX_RB_MRT_FLAG_BUFFER_PITCH_ARRAY_PITCH(rsc->layout.ubwc_size));
-               } else {
-                       OUT_RING(ring, 0x00000000);    /* RB_MRT_FLAG_BUFFER[i].ADDR_LO */
-                       OUT_RING(ring, 0x00000000);    /* RB_MRT_FLAG_BUFFER[i].ADDR_HI */
-                       OUT_RING(ring, 0x00000000);
-               }
+               fd6_emit_flag_reference(ring, rsc,
+                               psurf->u.tex.level, psurf->u.tex.first_layer);
        }
 
        OUT_PKT4(ring, REG_A6XX_RB_SRGB_CNTL, 1);
@@ -188,10 +198,6 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf,
                uint32_t base = gmem ? gmem->zsbuf_base[0] : 0;
                uint32_t offset = fd_resource_offset(rsc, zsbuf->u.tex.level,
                                zsbuf->u.tex.first_layer);
-               uint32_t ubwc_offset = fd_resource_ubwc_offset(rsc, zsbuf->u.tex.level,
-                               zsbuf->u.tex.first_layer);
-
-               bool ubwc_enabled = fd_resource_ubwc_enabled(rsc, zsbuf->u.tex.level);
 
                OUT_PKT4(ring, REG_A6XX_RB_DEPTH_BUFFER_INFO, 6);
                OUT_RING(ring, A6XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(fmt));
@@ -204,15 +210,8 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf,
                OUT_RING(ring, A6XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT(fmt));
 
                OUT_PKT4(ring, REG_A6XX_RB_DEPTH_FLAG_BUFFER_BASE_LO, 3);
-               if (ubwc_enabled) {
-                       OUT_RELOCW(ring, rsc->bo, ubwc_offset, 0, 0);   /* BASE_LO/HI */
-                       OUT_RING(ring, A6XX_RB_DEPTH_FLAG_BUFFER_PITCH_PITCH(rsc->layout.ubwc_pitch) |
-                               A6XX_RB_DEPTH_FLAG_BUFFER_PITCH_ARRAY_PITCH(rsc->layout.ubwc_size));
-               } else {
-                       OUT_RING(ring, 0x00000000);    /* RB_DEPTH_FLAG_BUFFER_BASE_LO */
-                       OUT_RING(ring, 0x00000000);    /* RB_DEPTH_FLAG_BUFFER_BASE_HI */
-                       OUT_RING(ring, 0x00000000);    /* RB_DEPTH_FLAG_BUFFER_PITCH */
-               }
+               fd6_emit_flag_reference(ring, rsc,
+                               zsbuf->u.tex.level, zsbuf->u.tex.first_layer);
 
                if (rsc->lrz) {
                        OUT_PKT4(ring, REG_A6XX_GRAS_LRZ_BUFFER_BASE_LO, 5);
@@ -969,7 +968,7 @@ emit_blit(struct fd_batch *batch,
        struct fdl_slice *slice;
        struct fd_resource *rsc = fd_resource(psurf->texture);
        enum pipe_format pfmt = psurf->format;
-       uint32_t offset, ubwc_offset;
+       uint32_t offset;
        bool ubwc_enabled;
 
        debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer);
@@ -984,8 +983,6 @@ emit_blit(struct fd_batch *batch,
        offset = fd_resource_offset(rsc, psurf->u.tex.level,
                        psurf->u.tex.first_layer);
        ubwc_enabled = fd_resource_ubwc_enabled(rsc, psurf->u.tex.level);
-       ubwc_offset = fd_resource_ubwc_offset(rsc, psurf->u.tex.level,
-                       psurf->u.tex.first_layer);
 
        debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer);
 
@@ -1013,9 +1010,8 @@ emit_blit(struct fd_batch *batch,
 
        if (ubwc_enabled) {
                OUT_PKT4(ring, REG_A6XX_RB_BLIT_FLAG_DST_LO, 3);
-               OUT_RELOCW(ring, rsc->bo, ubwc_offset, 0, 0);
-               OUT_RING(ring, A6XX_RB_BLIT_FLAG_DST_PITCH_PITCH(rsc->layout.ubwc_pitch) |
-                                A6XX_RB_BLIT_FLAG_DST_PITCH_ARRAY_PITCH(rsc->layout.ubwc_size));
+               fd6_emit_flag_reference(ring, rsc,
+                               psurf->u.tex.level, psurf->u.tex.first_layer);
        }
 
        fd6_emit_blit(batch, ring);

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_resource.h b/src/gallium/drivers/freedreno/a6xx/fd6_resource.h
index 80751d49ca919ac5d40a3cc8f96f86f6a69f8fd2..f639207c6bc208a9ac1d456ab115852acdb4c9ab 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_resource.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_resource.h
@@ -34,5 +34,7 @@ uint32_t fd6_fill_ubwc_buffer_sizes(struct fd_resource *rsc);
 void fd6_validate_format(struct fd_context *ctx, struct fd_resource *rsc,
                enum pipe_format format);
 uint32_t fd6_setup_slices(struct fd_resource *rsc);
+void fd6_emit_flag_reference(struct fd_ringbuffer *ring, struct fd_resource *rsc,
+               int level, int layer);
 
 #endif /* FD6_RESOURCE_H_ */