i965: Clarify check for which cache to use on Gen6 data port reads.

Currently, we use the Render Cache for scratch access (read/write data)
and the Sampler Cache for all read only data (pull constants).

Reversing the condition here is clearer: if the caller requested the
Render Cache, use that.  Otherwise, they requested the Data Cache
(which does not exist on Gen6) or Sampler Cache, so use the Sampler
Cache.

This should not change behavior in any way.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 7f6ed6810bf714727d71e121e38083441c3b724b..7773cff9217c6b06da686cce4b878df797044d77 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -626,10 +626,10 @@ brw_set_dp_read_message(struct brw_compile *p,
    } else if (intel->gen == 6) {
       uint32_t target_function;
 
-      if (target_cache == BRW_DATAPORT_READ_TARGET_DATA_CACHE)
-        target_function = GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE;
-      else
+      if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE)
         target_function = GEN6_MESSAGE_TARGET_DP_RENDER_CACHE;
+      else
+        target_function = GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE;
 
       insn->bits3.gen6_dp.binding_table_index = binding_table_index;
       insn->bits3.gen6_dp.msg_control = msg_control;