Start implementing groups of instructions which do the same thing on different sets...

--HG--
extra : convert_revision : 6a5be61831588f801965dd4e80cb52f28911c320

diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
index 482786e6fec3633170619038d6a4cbcdc5c18c83..c56a8bf92197eed51fccdb2e1508b0ae4e071024 100644 (file)
--- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
@@ -61,14 +61,14 @@
 0x1: decode OPCODE_OP_TOP5 {
     format WarnUnimpl {
         0x00: decode OPCODE_OP_BOTTOM3 {
-            0x0: add_Eb_Gb();
-            0x1: add_Ev_Gv();
-            0x2: add_Gb_Eb();
-            0x3: add_Gv_Ev();
-            0x4: add_Al_Ib();
-            0x5: add_rAX_Iz();
             0x6: push_ES();
             0x7: pop_ES();
+            default: MultiOp::add(
+                {{out1 = in1 + in2}},
+                OPCODE_OP_BOTTOM3,
+                [[Eb,Gb],[Ev,Gv],
+                 [Gb,Eb],[Gv,Ev],
+                 [Al,Ib],[rAx,Iz]]);
         }
         0x01: decode OPCODE_OP_BOTTOM3 {
             0x0: or_Eb_Gb();

diff --git a/src/arch/x86/isa/formats/formats.isa b/src/arch/x86/isa/formats/formats.isa
index 3287b92c54343d33cfcded524fb0a9eb83915059..d763c05bcaee1902165ce41d99ada201212eb09b 100644 (file)
--- a/src/arch/x86/isa/formats/formats.isa
+++ b/src/arch/x86/isa/formats/formats.isa
@@ -94,3 +94,7 @@
 //Include a format to signal m5 internal errors. This is used to indicate a
 //malfunction of the decode mechanism.
 ##include "error.isa"
+
+//Include a format which implements a batch of instructions which do the same
+//thing on a variety of inputs
+##include "multi.isa"

diff --git a/src/arch/x86/isa/formats/multi.isa b/src/arch/x86/isa/formats/multi.isa
new file mode 100644 (file)
index 0000000..3e80f9c
--- /dev/null
+++ b/src/arch/x86/isa/formats/multi.isa
@@ -0,0 +1,106 @@
+// -*- mode:c++ -*-
+
+// Copyright (c) 2007 The Hewlett-Packard Development Company
+// All rights reserved.
+//
+// Redistribution and use of this software in source and binary forms,
+// with or without modification, are permitted provided that the
+// following conditions are met:
+//
+// The software must be used only for Non-Commercial Use which means any
+// use which is NOT directed to receiving any direct monetary
+// compensation for, or commercial advantage from such use.  Illustrative
+// examples of non-commercial use are academic research, personal study,
+// teaching, education and corporate research & development.
+// Illustrative examples of commercial use are distributing products for
+// commercial advantage and providing services using the software for
+// commercial advantage.
+//
+// If you wish to use this software or functionality therein that may be
+// covered by patents for commercial use, please contact:
+//     Director of Intellectual Property Licensing
+//     Office of Strategy and Technology
+//     Hewlett-Packard Company
+//     1501 Page Mill Road
+//     Palo Alto, California  94304
+//
+// Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.  Redistributions
+// in binary form must reproduce the above copyright notice, this list of
+// conditions and the following disclaimer in the documentation and/or
+// other materials provided with the distribution.  Neither the name of
+// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.  No right of
+// sublicense is granted herewith.  Derivatives of the software and
+// output created using the software may be prepared, but only for
+// Non-Commercial Uses.  Derivatives of the software may be shared with
+// others provided: (i) the others agree to abide by the list of
+// conditions herein which includes the Non-Commercial Use restrictions;
+// and (ii) such Derivatives of the software include the above copyright
+// notice to acknowledge the contribution from this software where
+// applicable, this list of conditions and the disclaimer below.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// Authors: Gabe Black
+
+////////////////////////////////////////////////////////////////////
+//
+// Instructions that do the same thing to multiple sets of arguments.
+//
+
+output header {{
+}};
+
+output decoder {{
+}};
+
+output exec {{
+}};
+
+let {{
+    multiops = {}
+}};
+
+def format MultiOp(code, switchVal, opTags, *opt_flags) {{
+    # Loads and stores that bring in and write out values from the
+    # instructions. These are determined by the input and output tags,
+    # and the resulting instruction will have the right number of micro ops,
+    # or could be implemented as an atomic macro op.
+    instNames = []
+    for tagSet in opTags:
+        loads = []
+        stores = []
+        postfix = ''
+        for tag in tagSet:
+            postfix += '_' + tag
+        gather_inputs = ''
+        if len(loads) + len(stores) == 0:
+            # If there are no loads or stores, make this a single instruction.
+            iop = InstObjParams(name, Name + postfix, 'X86StaticInst',
+                    {"code": code, "gather_inputs": gather_inputs},
+                    opt_flags)
+        else:
+            # Build up a macro op. We'll punt on this for now
+            pass
+
+    decodeBlob = 'switch(%s) {\n' % switchVal
+    counter = 0
+    for inst in instNames:
+        decodeBlob += '%d: return (X86StaticInst *)(new %s(machInst));\n' % \
+                      (counter, inst)
+        counter += 1
+    decodeBlob += '}\n'
+    # decode_block = BasicDecodeWithMnemonic.subst(iop)
+}};