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Add initial qualcomm support.
authorJim Wilson <jim.wilson@linaro.org>
Thu, 12 Nov 2015 17:27:13 +0000 (17:27 +0000)
committerJim Wilson <wilson@gcc.gnu.org>
Thu, 12 Nov 2015 17:27:13 +0000 (09:27 -0800)
gcc/
* config/aarch64/aarch64-cores.def (qdf24xx): New.
* config/aarch64/aarch64-tune.md: Regenerated.
* config/arm/arm-cores.def (qdf24xx): New.
* config/arm/arm-tables.opt, config/arm/arm-tune.md: Regenerated.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add qdf24xx support.
* doc/invoke.texi (AArch64 Options/-mtune): Add "qdf24xx".
(ARM Options/-mtune); Likewise.

From-SVN: r230268

gcc/ChangeLog patch | blob | history
gcc/config/aarch64/aarch64-cores.def patch | blob | history
gcc/config/aarch64/aarch64-tune.md patch | blob | history
gcc/config/arm/arm-cores.def patch | blob | history
gcc/config/arm/arm-tables.opt patch | blob | history
gcc/config/arm/arm-tune.md patch | blob | history
gcc/config/arm/bpabi.h patch | blob | history
gcc/doc/invoke.texi patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4770f0f5e232814d75223c9211f997e8a96f389a..35cdf196caa04ae76908c8548f21524d00cca795 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2015-11-12  Jim Wilson  <jim.wilson@linaro.org>
+
+       * config/aarch64/aarch64-cores.def (qdf24xx): New.
+       * config/aarch64/aarch64-tune.md: Regenerated.
+       * config/arm/arm-cores.def (qdf24xx): New.
+       * config/arm/arm-tables.opt, config/arm/arm-tune.md: Regenerated.
+       * config/arm/bpabi.h (BE8_LINK_SPEC): Add qdf24xx support.
+       * doc/invoke.texi (AArch64 Options/-mtune): Add "qdf24xx".
+       (ARM Options/-mtune); Likewise.
+
 2015-11-12  Martin Liska  <mliska@suse.cz>
 
        * config/i386/i386.c (ix86_valid_target_attribute_p):
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 0ab1ca839e2ee9cacd7ad4f996176307318f4de2..4af70ca613c8d1ff550fed01b1f86f59dd545fa1 100644 (file)
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -44,6 +44,7 @@ AARCH64_CORE("cortex-a53",  cortexa53, cortexa53, 8A,  AARCH64_FL_FOR_ARCH8 | AA
 AARCH64_CORE("cortex-a57",  cortexa57, cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07")
 AARCH64_CORE("cortex-a72",  cortexa72, cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08")
 AARCH64_CORE("exynos-m1",   exynosm1,  cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa72, "0x53", "0x001")
+AARCH64_CORE("qdf24xx",     qdf24xx,   cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57, "0x51", "0x800")
 AARCH64_CORE("thunderx",    thunderx,  thunderx,  8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx,  "0x43", "0x0a1")
 AARCH64_CORE("xgene1",      xgene1,    xgene1,    8A,  AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000")
 
diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md
index 7d063e45e7d4de151d0cd975d27e1b58c143d8a8..c65a12420ad8f3263e7f30ba3c763d99688c52c5 100644 (file)
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from aarch64-cores.def
 (define_attr "tune"
-       "cortexa53,cortexa57,cortexa72,exynosm1,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
+       "cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
        (const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index 4c35200b3f8a768047f22aa205671509a484fb3b..86ed0cb1dbef13f57dc2678e8c589b337b630e3f 100644 (file)
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -169,6 +169,7 @@ ARM_CORE("cortex-a53",      cortexa53, cortexa53,   8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED
 ARM_CORE("cortex-a57", cortexa57, cortexa57,   8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
 ARM_CORE("cortex-a72", cortexa72, cortexa57,   8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
 ARM_CORE("exynos-m1",  exynosm1,  cortexa57,   8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
+ARM_CORE("qdf24xx",    qdf24xx,   cortexa57,   8A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
 ARM_CORE("xgene1",      xgene1,    xgene1,      8A,    ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH8A),            xgene1)
 
 /* V8 big.LITTLE implementations */
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index 77e44aac0b84ed720fa6873382a316f41c373984..41bf1ff250bfd09d6aeeff9b30b71991fc76430a 100644 (file)
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -315,6 +315,9 @@ Enum(processor_type) String(cortex-a72) Value(cortexa72)
 EnumValue
 Enum(processor_type) String(exynos-m1) Value(exynosm1)
 
+EnumValue
+Enum(processor_type) String(qdf24xx) Value(qdf24xx)
+
 EnumValue
 Enum(processor_type) String(xgene1) Value(xgene1)
 
diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index 8b21d179e04967f6789c5c8dd288ca59664d963d..e56b5ad8cb5abbb117315a4cbdb098e2b1b64be3 100644 (file)
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -33,6 +33,6 @@
        cortexm7,cortexm4,cortexm3,
        marvell_pj4,cortexa15cortexa7,cortexa17cortexa7,
        cortexa53,cortexa57,cortexa72,
-       exynosm1,xgene1,cortexa57cortexa53,
-       cortexa72cortexa53"
+       exynosm1,qdf24xx,xgene1,
+       cortexa57cortexa53,cortexa72cortexa53"
        (const (symbol_ref "((enum attr_tune) arm_tune)")))
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index ceaf2cc338554ac40f6192f0964d4b46f6cd64c3..8af460549b0d59c2bd58456aeb4f23133315a358 100644 (file)
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -74,6 +74,7 @@
    |mcpu=cortex-a72                                    \
    |mcpu=cortex-a72.cortex-a53                         \
    |mcpu=exynos-m1                                      \
+   |mcpu=qdf24xx                                       \
    |mcpu=xgene1                                         \
    |mcpu=cortex-m1.small-multiply                       \
    |mcpu=cortex-m0.small-multiply                       \
@@ -99,6 +100,7 @@
    |mcpu=cortex-a72                                    \
    |mcpu=cortex-a72.cortex-a53                         \
    |mcpu=exynos-m1                                      \
+   |mcpu=qdf24xx                                       \
    |mcpu=xgene1                                         \
    |mcpu=cortex-m1.small-multiply                       \
    |mcpu=cortex-m0.small-multiply                       \
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index fb908b3a2bc335befd5e6ef4eb9e43b50a62b233..c18df986f057801816757777324d10386f683080 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12577,7 +12577,7 @@ processors implementing the target architecture.
 Specify the name of the target processor for which GCC should tune the
 performance of the code.  Permissible values for this option are:
 @samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72},
-@samp{exynos-m1}, @samp{thunderx}, @samp{xgene1}.
+@samp{exynos-m1}, @samp{qdf24xx}, @samp{thunderx}, @samp{xgene1}.
 
 Additionally, this option can specify that GCC should tune the performance
 of the code for a big.LITTLE system.  Permissible values for this
@@ -13564,6 +13564,7 @@ Permissible names are: @samp{arm2}, @samp{arm250},
 @samp{cortex-m0.small-multiply},
 @samp{cortex-m0plus.small-multiply},
 @samp{exynos-m1},
+@samp{qdf24xx},
 @samp{marvell-pj4},
 @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312},
 @samp{fa526}, @samp{fa626},