(no commit message)

diff --git a/openpower/atomics.mdwn b/openpower/atomics.mdwn
index 39dc94d02890cd94179269931c830fbbab2b0c93..22e17801b1c46465c34bcc669828eeff8c16d9dd 100644 (file)
--- a/openpower/atomics.mdwn
+++ b/openpower/atomics.mdwn
@@ -115,7 +115,12 @@ see [[discussion]] for proposed operations and thoughts TODO
 remove this sentence
 
 
-# TODO: add list of proposed instructions
+# DRAFT atomic instructions
+
+These two instructions, `lat` and `stat`, are identical
+to `lwat/ldat` and `stwat/stdat` except add acquire and
+release guaranteed ordering semantics as well as 8 and
+16 bit memory widths as well.
 
 AT-Form (TODO)
 
@@ -139,13 +144,15 @@ atomic memory operations
 * `ew` specifies the memory operation width: 0/1/2/3 8/16/32/64
 * If the `aq` bit is set,
   then no later atomic memory operations can be observed
-  to take place before the AMO.
+  to take place before the AMO in this or other cores.
+  (A Write-after-Read Memory Hazard is created)
 * If the `rl` bit is set, then other cores will not observe the AMO before 
   memory accesses preceding the AMO.
+  (A Read-after-Write Memory Hazard is created)
 * Setting both the `aq` and the `rl` bit makes the sequence
   sequentially consistent, meaning that
-  it cannot be reordered with earlier or later atomic
-  memory operations.
+  it cannot be reordered with respect to earlier or later atomic
+  memory operations. (Both a RaW and WaR are simultaneously created)
 * `FC` is identical to the Function tables used in Power ISA v3 for `lwat`
   and `stwat`