r600g: determine in advance if hw has vertex cache

diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 6205a20142ec309711bbb638a34dfbdf894c05ff..6c0733d31ad1aa9175b5ab127ef8f97219ef24d0 100644 (file)
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -1163,22 +1163,11 @@ void r600_inval_texture_cache(struct r600_context *ctx)
 
 void r600_inval_vertex_cache(struct r600_context *ctx)
 {
-       if (ctx->family == CHIP_RV610 ||
-           ctx->family == CHIP_RV620 ||
-           ctx->family == CHIP_RS780 ||
-           ctx->family == CHIP_RS880 ||
-           ctx->family == CHIP_RV710 ||
-           ctx->family == CHIP_CEDAR ||
-           ctx->family == CHIP_PALM ||
-           ctx->family == CHIP_SUMO ||
-           ctx->family == CHIP_SUMO2 ||
-           ctx->family == CHIP_CAICOS ||
-           ctx->family == CHIP_CAYMAN ||
-           ctx->family == CHIP_ARUBA) {
+       if (ctx->has_vertex_cache) {
+               ctx->surface_sync_cmd.flush_flags |= S_0085F0_VC_ACTION_ENA(1);
+       } else {
                /* Some GPUs don't have the vertex cache and must use the texture cache instead. */
                ctx->surface_sync_cmd.flush_flags |= S_0085F0_TC_ACTION_ENA(1);
-       } else {
-               ctx->surface_sync_cmd.flush_flags |= S_0085F0_VC_ACTION_ENA(1);
        }
        r600_atom_dirty(ctx, &ctx->surface_sync_cmd.atom);
 }

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 3ab78ea040d42eea3cc456676a0462c6b8dc7a0f..7c40e506fb787f47c1e16a02afd589d99fabf259 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -263,6 +263,11 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
                if (r600_context_init(rctx))
                        goto fail;
                rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
+               rctx->has_vertex_cache = !(rctx->family == CHIP_RV610 ||
+                                          rctx->family == CHIP_RV620 ||
+                                          rctx->family == CHIP_RS780 ||
+                                          rctx->family == CHIP_RS880 ||
+                                          rctx->family == CHIP_RV710);
                break;
        case EVERGREEN:
        case CAYMAN:
@@ -271,6 +276,13 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
                if (evergreen_context_init(rctx))
                        goto fail;
                rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
+               rctx->has_vertex_cache = !(rctx->family == CHIP_CEDAR ||
+                                          rctx->family == CHIP_PALM ||
+                                          rctx->family == CHIP_SUMO ||
+                                          rctx->family == CHIP_SUMO2 ||
+                                          rctx->family == CHIP_CAICOS ||
+                                          rctx->family == CHIP_CAYMAN ||
+                                          rctx->family == CHIP_ARUBA);
                break;
        default:
                R600_ERR("Unsupported chip class %d.\n", rctx->chip_class);

diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 9139b61ed69333b8885e8cd400a389b2e790a47c..ccbfaa7d0102a168633b08dbbfb002a3acffa67d 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -235,6 +235,7 @@ struct r600_context {
        struct blitter_context          *blitter;
        enum radeon_family              family;
        enum chip_class                 chip_class;
+       boolean                         has_vertex_cache;
        unsigned                        r6xx_num_clause_temp_gprs;
        void                            *custom_dsa_flush;
        struct r600_screen              *screen;