;;- See file "rtl.def" for documentation on define_insn, match_*, et. al.
\f
+;; There are very few (4) 'f' registers, they can't be loaded/stored from/to
+;; memory, and some instructions explicitly require them, so we get better
+;; code by discouraging psuedo-registers from being allocated to them.
+;; However, we do want to allow all patterns which can store to them to
+;; include them in their constraints, so we always use '*f' in a destination
+;; constraint except when 'f' is the only alternative.
+\f
;; Insn attributes which describe the i960.
;; Modscan is not used, since the compiler never emits any of these insns.
}")
(define_insn ""
- [(set (match_operand:DF 0 "general_operand" "=r,f,d,d,m,o")
+ [(set (match_operand:DF 0 "general_operand" "=r,*f,d,d,m,o")
(match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,d,G"))]
"current_function_args_size == 0
&& (register_operand (operands[0], DFmode)
[(set_attr "type" "move,move,load,fpload,fpstore,fpstore")])
(define_insn ""
- [(set (match_operand:DF 0 "general_operand" "=r,f,d,d,m")
+ [(set (match_operand:DF 0 "general_operand" "=r,*f,d,d,m")
(match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
"current_function_args_size != 0
&& (register_operand (operands[0], DFmode)
}")
(define_insn ""
- [(set (match_operand:SF 0 "general_operand" "=r,f,d,d,m")
+ [(set (match_operand:SF 0 "general_operand" "=r,*f,d,d,m")
(match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,dG"))]
"current_function_args_size == 0
&& (register_operand (operands[0], SFmode)
[(set_attr "type" "move,move,load,fpload,fpstore")])
(define_insn ""
- [(set (match_operand:SF 0 "general_operand" "=r,f,d,d,m")
+ [(set (match_operand:SF 0 "general_operand" "=r,*f,d,d,m")
(match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
"current_function_args_size != 0
&& (register_operand (operands[0], SFmode)
;; Conversions between float and double.
(define_insn "extendsfdf2"
- [(set (match_operand:DF 0 "register_operand" "=f,d")
+ [(set (match_operand:DF 0 "register_operand" "=*f,d")
(float_extend:DF (match_operand:SF 1 "fp_arith_operand" "dGH,fGH")))]
"TARGET_NUMERICS"
"@
[(set_attr "type" "fpcvt")])
(define_insn "floatsisf2"
- [(set (match_operand:SF 0 "register_operand" "=df")
+ [(set (match_operand:SF 0 "register_operand" "=d*f")
(float:SF (match_operand:SI 1 "register_operand" "d")))]
"TARGET_NUMERICS"
"cvtir %1,%0"
;; Floating point arithmetic instructions.
(define_insn "adddf3"
- [(set (match_operand:DF 0 "register_operand" "=d")
+ [(set (match_operand:DF 0 "register_operand" "=d*f")
(plus:DF (match_operand:DF 1 "fp_arith_operand" "%rGH")
(match_operand:DF 2 "fp_arith_operand" "rGH")))]
"TARGET_NUMERICS"
[(set_attr "type" "fpadd")])
(define_insn "addsf3"
- [(set (match_operand:SF 0 "register_operand" "=d")
+ [(set (match_operand:SF 0 "register_operand" "=d*f")
(plus:SF (match_operand:SF 1 "fp_arith_operand" "%rGH")
(match_operand:SF 2 "fp_arith_operand" "rGH")))]
"TARGET_NUMERICS"
(define_insn "subdf3"
- [(set (match_operand:DF 0 "register_operand" "=d")
+ [(set (match_operand:DF 0 "register_operand" "=d*f")
(minus:DF (match_operand:DF 1 "fp_arith_operand" "rGH")
(match_operand:DF 2 "fp_arith_operand" "rGH")))]
"TARGET_NUMERICS"
[(set_attr "type" "fpadd")])
(define_insn "subsf3"
- [(set (match_operand:SF 0 "register_operand" "=d")
+ [(set (match_operand:SF 0 "register_operand" "=d*f")
(minus:SF (match_operand:SF 1 "fp_arith_operand" "rGH")
(match_operand:SF 2 "fp_arith_operand" "rGH")))]
"TARGET_NUMERICS"
(define_insn "muldf3"
- [(set (match_operand:DF 0 "register_operand" "=d")
+ [(set (match_operand:DF 0 "register_operand" "=d*f")
(mult:DF (match_operand:DF 1 "fp_arith_operand" "rGH")
(match_operand:DF 2 "fp_arith_operand" "rGH")))]
"TARGET_NUMERICS"
[(set_attr "type" "fpmul")])
(define_insn "mulsf3"
- [(set (match_operand:SF 0 "register_operand" "=d")
+ [(set (match_operand:SF 0 "register_operand" "=d*f")
(mult:SF (match_operand:SF 1 "fp_arith_operand" "rGH")
(match_operand:SF 2 "fp_arith_operand" "rGH")))]
"TARGET_NUMERICS"
(define_insn "divdf3"
- [(set (match_operand:DF 0 "register_operand" "=d")
+ [(set (match_operand:DF 0 "register_operand" "=d*f")
(div:DF (match_operand:DF 1 "fp_arith_operand" "rGH")
(match_operand:DF 2 "fp_arith_operand" "rGH")))]
"TARGET_NUMERICS"
[(set_attr "type" "fpdiv")])
(define_insn "divsf3"
- [(set (match_operand:SF 0 "register_operand" "=d")
+ [(set (match_operand:SF 0 "register_operand" "=d*f")
(div:SF (match_operand:SF 1 "fp_arith_operand" "rGH")
(match_operand:SF 2 "fp_arith_operand" "rGH")))]
"TARGET_NUMERICS"
[(set_attr "type" "fpdiv")])
(define_insn "negdf2"
- [(set (match_operand:DF 0 "register_operand" "=d,f")
+ [(set (match_operand:DF 0 "register_operand" "=d,d*f")
(neg:DF (match_operand:DF 1 "register_operand" "d,r")))]
""
"*
[(set_attr "type" "fpadd")])
(define_insn "negsf2"
- [(set (match_operand:SF 0 "register_operand" "=d,f")
+ [(set (match_operand:SF 0 "register_operand" "=d,d*f")
(neg:SF (match_operand:SF 1 "register_operand" "d,r")))]
""
"@
;;; less than 32.
(define_insn "absdf2"
- [(set (match_operand:DF 0 "register_operand" "=df")
+ [(set (match_operand:DF 0 "register_operand" "=d*f")
(abs:DF (match_operand:DF 1 "register_operand" "df")))]
""
"*
[(set_attr "type" "multi")])
(define_insn "abssf2"
- [(set (match_operand:SF 0 "register_operand" "=df")
+ [(set (match_operand:SF 0 "register_operand" "=d*f")
(abs:SF (match_operand:SF 1 "register_operand" "df")))]
""
"*
}")
(define_insn ""
- [(set (match_operand:TF 0 "general_operand" "=r,f,d,d,m,o")
+ [(set (match_operand:TF 0 "general_operand" "=r,*f,d,d,m,o")
(match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,d,G"))]
"current_function_args_size == 0
&& (register_operand (operands[0], TFmode)
[(set_attr "type" "move,move,load,fpload,fpstore,fpstore")])
(define_insn ""
- [(set (match_operand:TF 0 "general_operand" "=r,f,d,d,m")
+ [(set (match_operand:TF 0 "general_operand" "=r,*f,d,d,m")
(match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
"current_function_args_size != 0
&& (register_operand (operands[0], TFmode)
[(set_attr "type" "move,move,load,fpload,fpstore")])
(define_insn "extendsftf2"
- [(set (match_operand:TF 0 "register_operand" "=f,d")
+ [(set (match_operand:TF 0 "register_operand" "=*f,d")
(float_extend:TF
(match_operand:SF 1 "register_operand" "d,f")))]
"TARGET_NUMERICS"
[(set_attr "type" "fpmove")])
(define_insn "extenddftf2"
- [(set (match_operand:TF 0 "register_operand" "=f,d")
+ [(set (match_operand:TF 0 "register_operand" "=*f,d")
(float_extend:TF
(match_operand:DF 1 "register_operand" "d,f")))]
"TARGET_NUMERICS"