radeonsi/gfx10: enable the workaround for unaligned vertex fetch

Yes, really. Note that non-format buffer loads are unaffected and work
just fine with unaligned pointers (as long as SH_MEM_CONFIG is setup
correctly, which amdgpu ensures).

Fixes e.g. KHR-GL45.vertex_attrib_64bit.vao

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 35167f31fb1a1c0f50924b36fd921a802ea0f94e..68ba7d6403e7ea76e8f7a5c9529df8d00b5693e5 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -4970,7 +4970,9 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
                 * into account would complicate the fast path (where everything
                 * is nicely aligned).
                 */
-               bool check_alignment = log_hw_load_size >= 1 && sscreen->info.chip_class == GFX6;
+               bool check_alignment =
+                       log_hw_load_size >= 1 &&
+                       (sscreen->info.chip_class == GFX6 || sscreen->info.chip_class == GFX10);
                bool opencode = sscreen->options.vs_fetch_always_opencode;
 
                if (check_alignment &&