Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture feasibility
authorJacob Lifshay <programmerjake@gmail.com>
Sun, 15 Mar 2020 03:17:07 +0000 (20:17 -0700)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Sun, 15 Mar 2020 03:17:20 +0000 (03:17 +0000)
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+In-Reply-To: <6AC4EFD4-AA30-42C7-855A-CE68A62F107F@gatech.edu>
+From: Jacob Lifshay <programmerjake@gmail.com>
+Date: Sat, 14 Mar 2020 20:17:07 -0700
+Message-ID: <CAC2bXD6j_Swv4iOPMGC3ZgYpc8+ThqoFnOXqpXGkk4a1e_0Nqw@mail.gmail.com>
+To: "Immanuel, Yehowshua U" <yimmanuel3@gatech.edu>
+X-Content-Filtered-By: Mailman/MimeDel 2.1.23
+Subject: Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture
+ feasibility
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