sim: riscv: fix building on 32-bit hosts w/out int128

Check for __SIZEOF_INT128__ before trying to use the builtin type.
This fixes building on some 32-bit systems like x86.

diff --git a/sim/riscv/ChangeLog b/sim/riscv/ChangeLog
index 37284a982a9bb14b6b27057f924c02f5540b7266..367faac9d4ed77fbfc98ce6072114f153e86a4f7 100644 (file)
--- a/sim/riscv/ChangeLog
+++ b/sim/riscv/ChangeLog
@@ -1,3 +1,7 @@
+2021-05-01  Mike Frysinger  <vapier@gentoo.org>
+
+       * sim-main.c (mulhu): Check if __SIZEOF_INT128__ is defined.
+
 2021-04-26  Mike Frysinger  <vapier@gentoo.org>
 
        * sim-main.c (MAX, MIN): Delete.

diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index a80dc6838260db05f34bfa674f154122c08a5e4b..6a2904cced738b5a9c4b2c725330dda173b6ffde 100644 (file)
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -603,7 +603,7 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
 static unsigned64
 mulhu (unsigned64 a, unsigned64 b)
 {
-#ifdef __GNUC__
+#if defined(__GNUC__) && defined(__SIZEOF_INT128__)
   return ((__int128)a * b) >> 64;
 #else
   uint64_t t;