radeon/r200/r300/r600: make bo mapping be explicit

This moves the bo mapping outside the DMA layer and makes it explicit,
this should in theory make it simpler to split the clean up the dma/cmdbuf
linkage that I created before that is broken.

Tested on: r600, rv380 (tcl/no-tcl), rv200 (tcl/no-tcl)

Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/mesa/drivers/dri/r200/r200_maos_arrays.c b/src/mesa/drivers/dri/r200/r200_maos_arrays.c
index 383a0c4b0d3ea6c67c3f8ea1d973a77fcec32f4c..249c0bbc11d2ef7236f5d08d786c010ed7a1e8bc 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_maos_arrays.c
+++ b/src/mesa/drivers/dri/r200/r200_maos_arrays.c
@@ -90,12 +90,14 @@ static void r200_emit_vecfog(GLcontext *ctx, struct radeon_aos *aos,
        aos->components = size;
        aos->count = count;
 
+       radeon_bo_map(aos->bo, 1);
        out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
        for (i = 0; i < count; i++) {
          out[0] = r200ComputeFogBlendFactor( ctx, *(GLfloat *)data );
          out++;
          data += stride;
        }
+       radeon_bo_unmap(aos->bo);
 }
 
 /* Emit any changed arrays to new GART memory, re-emit a packet to

diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c
index fadc766b49f92f85cbddac56ec2ea8634c4bb0a9..4596912ddc75ed33bf0676b0b9a8134cba026af8 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_swtcl.c
+++ b/src/mesa/drivers/dri/r200/r200_swtcl.c
@@ -297,7 +297,7 @@ void r200_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
    radeonEmitState(&rmesa->radeon);
    r200EmitVertexAOS( rmesa,
                      rmesa->radeon.swtcl.vertex_size,
-                     first_elem(&rmesa->radeon.dma.reserved)->bo,
+                     rmesa->radeon.swtcl.bo,
                      current_offset);
 
 

diff --git a/src/mesa/drivers/dri/r300/r300_draw.c b/src/mesa/drivers/dri/r300/r300_draw.c
index e9968f9ffeffb8d958ac9f1245e8cd41e196c4b8..3dcd986e2267f3ae09abc6342e0efaa30dbe4456 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_draw.c
+++ b/src/mesa/drivers/dri/r300/r300_draw.c
@@ -100,7 +100,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
                GLubyte *in = (GLubyte *)src_ptr;
 
                radeonAllocDmaRegion(&r300->radeon, &r300->ind_buf.bo, &r300->ind_buf.bo_offset, size, 4);
-
+               radeon_bo_map(r300->ind_buf.bo, 1);
                assert(r300->ind_buf.bo->ptr != NULL);
                out = (GLuint *)ADD_POINTERS(r300->ind_buf.bo->ptr, r300->ind_buf.bo_offset);
 
@@ -111,7 +111,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
                if (i < mesa_ind_buf->count) {
                        *out++ = in[i];
                }
-
+               radeon_bo_unmap(r300->ind_buf.bo);
 #if MESA_BIG_ENDIAN
        } else { /* if (mesa_ind_buf->type == GL_UNSIGNED_SHORT) */
                GLushort *in = (GLushort *)src_ptr;
@@ -120,6 +120,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
                radeonAllocDmaRegion(&r300->radeon, &r300->ind_buf.bo,
                                     &r300->ind_buf.bo_offset, size, 4);
 
+               radeon_bo_map(r300->ind_buf.bo, 1);
                assert(r300->ind_buf.bo->ptr != NULL);
                out = (GLuint *)ADD_POINTERS(r300->ind_buf.bo->ptr, r300->ind_buf.bo_offset);
 
@@ -130,6 +131,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
                if (i < mesa_ind_buf->count) {
                        *out++ = in[i];
                }
+               radeon_bo_unmap(r300->ind_buf.bo);
 #endif
        }
 
@@ -173,10 +175,12 @@ static void r300SetupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
 
                radeonAllocDmaRegion(&r300->radeon, &r300->ind_buf.bo, &r300->ind_buf.bo_offset, size, 4);
 
+               radeon_bo_map(r300->ind_buf.bo, 1);
                assert(r300->ind_buf.bo->ptr != NULL);
                dst_ptr = ADD_POINTERS(r300->ind_buf.bo->ptr, r300->ind_buf.bo_offset);
                _mesa_memcpy(dst_ptr, src_ptr, size);
 
+               radeon_bo_unmap(r300->ind_buf.bo);
                r300->ind_buf.is_32bit = (mesa_ind_buf->type == GL_UNSIGNED_INT);
                r300->ind_buf.count = mesa_ind_buf->count;
 
@@ -242,6 +246,7 @@ static void r300ConvertAttrib(GLcontext *ctx, int count, const struct gl_client_
        }
 
        radeonAllocDmaRegion(&r300->radeon, &attr->bo, &attr->bo_offset, sizeof(GLfloat) * input->Size * count, 32);
+       radeon_bo_map(attr->bo, 1);
        dst_ptr = (GLfloat *)ADD_POINTERS(attr->bo->ptr, attr->bo_offset);
 
        radeon_print(RADEON_FALLBACKS, RADEON_IMPORTANT,
@@ -280,6 +285,7 @@ static void r300ConvertAttrib(GLcontext *ctx, int count, const struct gl_client_
                        break;
        }
 
+       radeon_bo_unmap(attr->bo);
        if (mapped_named_bo) {
                ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj);
        }
@@ -294,6 +300,8 @@ static void r300AlignDataToDword(GLcontext *ctx, const struct gl_client_array *i
 
        radeonAllocDmaRegion(&r300->radeon, &attr->bo, &attr->bo_offset, size, 32);
 
+       radeon_bo_map(attr->bo, 1);
+
        if (!input->BufferObj->Pointer) {
                ctx->Driver.MapBuffer(ctx, GL_ARRAY_BUFFER, GL_READ_ONLY_ARB, input->BufferObj);
                mapped_named_bo = GL_TRUE;
@@ -317,6 +325,7 @@ static void r300AlignDataToDword(GLcontext *ctx, const struct gl_client_array *i
                ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj);
        }
 
+       radeon_bo_unmap(attr->bo);
        attr->stride = dst_stride;
 }
 
@@ -527,6 +536,7 @@ static void r300AllocDmaRegions(GLcontext *ctx, const struct gl_client_array *in
                                }
 
                                radeonAllocDmaRegion(&r300->radeon, &vbuf->attribs[index].bo, &vbuf->attribs[index].bo_offset, size, 32);
+                               radeon_bo_map(vbuf->attribs[index].bo, 1);
                                assert(vbuf->attribs[index].bo->ptr != NULL);
                                dst = (uint32_t *)ADD_POINTERS(vbuf->attribs[index].bo->ptr, vbuf->attribs[index].bo_offset);
                                switch (vbuf->attribs[index].dwords) {
@@ -536,6 +546,7 @@ static void r300AllocDmaRegions(GLcontext *ctx, const struct gl_client_array *in
                                        case 4: radeonEmitVec16(dst, input[i]->Ptr, input[i]->StrideB, local_count); break;
                                        default: assert(0); break;
                                }
+                               radeon_bo_unmap(vbuf->attribs[index].bo);
 
                        }
                }

diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.c b/src/mesa/drivers/dri/r300/r300_swtcl.c
index 99bd22edac6c605973a11077c568e9d98512a848..383c8a274b5345cbc5428c3fefeb6e67bd13aca8 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_swtcl.c
+++ b/src/mesa/drivers/dri/r300/r300_swtcl.c
@@ -665,11 +665,11 @@ void r300_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
        r300EmitCacheFlush(rmesa);
 
        radeonEmitState(&rmesa->radeon);
-    r300_emit_scissor(ctx);
+       r300_emit_scissor(ctx);
        r300EmitVertexAOS(rmesa,
-                       rmesa->radeon.swtcl.vertex_size,
-                       first_elem(&rmesa->radeon.dma.reserved)->bo,
-                       current_offset);
+                         rmesa->radeon.swtcl.vertex_size,
+                         rmesa->radeon.swtcl.bo,
+                         current_offset);
 
        r300EmitVbufPrim(rmesa,
                   rmesa->radeon.swtcl.hw_primitive,

diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 47f89c91f87cd57da04b193ab4fbb0c1ec62cb23..eab27cbd8429aeb9582051b48722a7c557e034f6 100644 (file)
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -526,6 +526,9 @@ static void r700ConvertAttrib(GLcontext *ctx, int count,
 
     radeonAllocDmaRegion(&context->radeon, &attr->bo, &attr->bo_offset, 
                          sizeof(GLfloat) * input->Size * count, 32);
+
+    radeon_bo_map(attr->bo, 1);
+
     dst_ptr = (GLfloat *)ADD_POINTERS(attr->bo->ptr, attr->bo_offset);
 
     assert(src_ptr != NULL);
@@ -559,6 +562,8 @@ static void r700ConvertAttrib(GLcontext *ctx, int count,
             break;
     }
 
+    radeon_bo_unmap(attr->bo);
+
     if (mapped_named_bo) 
     {
         ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj);
@@ -577,6 +582,8 @@ static void r700AlignDataToDword(GLcontext *ctx,
 
     radeonAllocDmaRegion(&context->radeon, &attr->bo, &attr->bo_offset, size, 32);
 
+    radeon_bo_map(attr->bo, 1);
+
     if (!input->BufferObj->Pointer) 
     {
         ctx->Driver.MapBuffer(ctx, GL_ARRAY_BUFFER, GL_READ_ONLY_ARB, input->BufferObj);
@@ -596,6 +603,7 @@ static void r700AlignDataToDword(GLcontext *ctx,
         }
     }
 
+    radeon_bo_unmap(attr->bo);
     if (mapped_named_bo) 
     {
         ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj);
@@ -664,14 +672,18 @@ static void r700SetupStreams(GLcontext *ctx, const struct gl_client_array *input
 
                 radeonAllocDmaRegion(&context->radeon, &context->stream_desc[index].bo, 
                                      &context->stream_desc[index].bo_offset, size, 32);
+
+                radeon_bo_map(context->stream_desc[index].bo, 1);
                 assert(context->stream_desc[index].bo->ptr != NULL);
+
+
                 dst = (uint32_t *)ADD_POINTERS(context->stream_desc[index].bo->ptr, 
                                                context->stream_desc[index].bo_offset);
 
                 switch (context->stream_desc[index].dwords) 
                 {
                 case 1:                     
-                    radeonEmitVec4(dst, input[i]->Ptr, input[i]->StrideB, local_count);                         
+                    radeonEmitVec4(dst, input[i]->Ptr, input[i]->StrideB, local_count);
                     break;
                 case 2: 
                     radeonEmitVec8(dst, input[i]->Ptr, input[i]->StrideB, local_count); 
@@ -686,6 +698,7 @@ static void r700SetupStreams(GLcontext *ctx, const struct gl_client_array *input
                     assert(0); 
                     break;
                 }
+               radeon_bo_unmap(context->stream_desc[index].bo);
             }
         }
 
@@ -757,6 +770,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
        radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo,
                             &context->ind_buf.bo_offset, size, 4);
 
+       radeon_bo_map(context->ind_buf.bo, 1);
        assert(context->ind_buf.bo->ptr != NULL);
        out = (GLuint *)ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset);
 
@@ -770,6 +784,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
             *out++ = in[i];
         }
 
+       radeon_bo_unmap(context->ind_buf.bo);
 #if MESA_BIG_ENDIAN
     }
     else
@@ -780,6 +795,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
        radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo,
                             &context->ind_buf.bo_offset, size, 4);
 
+       radeon_bo_map(context->ind_buf.bo, 1);
        assert(context->ind_buf.bo->ptr != NULL);
        out = (GLuint *)ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset);
 
@@ -792,6 +808,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
         {
             *out++ = in[i];
         }
+       radeon_bo_unmap(context->ind_buf.bo);
 #endif
     }
 
@@ -837,11 +854,13 @@ static void r700SetupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer
 
        radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo,
                             &context->ind_buf.bo_offset, size, 4);
+       radeon_bo_map(context->ind_buf.bo, 1);
        assert(context->ind_buf.bo->ptr != NULL);
        dst_ptr = ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset);
 
         _mesa_memcpy(dst_ptr, src_ptr, size);
 
+       radeon_bo_unmap(context->ind_buf.bo);
         context->ind_buf.is_32bit = (mesa_ind_buf->type == GL_UNSIGNED_INT);
         context->ind_buf.count = mesa_ind_buf->count;
 

diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index ded81fff29f6294e84fc97e811a176d948b8c306..ad953ddbb5afa8fc0c6c1b921c2b38d598b6f091 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -328,6 +328,7 @@ struct radeon_swtcl_info {
        GLuint vertex_attr_count;
 
        GLuint emit_prediction;
+        struct radeon_bo *bo;
 };
 
 #define RADEON_MAX_AOS_ARRAYS          16

diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c
index c6edbae9a1b9661da06689ac7a9ebcc60ed7c992..2a1bd7357a319d397818bc7e4c6914bb1018b4d9 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_dma.c
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.c
@@ -151,6 +151,7 @@ void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos,
        aos->components = size;
        aos->count = count;
 
+       radeon_bo_map(aos->bo, 1);
        out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
        switch (size) {
        case 1: radeonEmitVec4(out, data, stride, count); break;
@@ -161,6 +162,7 @@ void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos,
                assert(0);
                break;
        }
+       radeon_bo_unmap(aos->bo);
 }
 
 void radeon_init_dma(radeonContextPtr rmesa)
@@ -183,10 +185,6 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size)
                        __FUNCTION__, size, rmesa->dma.minimum_size);
 
 
-       /* unmap old reserved bo */
-       if (!is_empty_list(&rmesa->dma.reserved))
-               radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo);
-
        if (is_empty_list(&rmesa->dma.free)
              || last_elem(&rmesa->dma.free)->bo->size < size) {
                dma_bo = CALLOC_STRUCT(radeon_dma_bo);
@@ -223,8 +221,6 @@ again_alloc:
         /* Cmd buff have been flushed in radeon_revalidate_bos */
                goto again_alloc;
        }
-
-       radeon_bo_map(first_elem(&rmesa->dma.reserved)->bo, 1);
 }
 
 /* Allocates a region from rmesa->dma.current.  If there isn't enough
@@ -281,7 +277,6 @@ void radeonFreeDmaRegions(radeonContextPtr rmesa)
 
        foreach_s(dma_bo, temp, &rmesa->dma.reserved) {
                remove_from_list(dma_bo);
-               radeon_bo_unmap(dma_bo->bo);
                radeon_bo_unref(dma_bo->bo);
                FREE(dma_bo);
        }
@@ -367,9 +362,6 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
                insert_at_tail(&rmesa->dma.free, dma_bo);
        }
 
-       /* unmap the last dma region */
-       if (!is_empty_list(&rmesa->dma.reserved))
-               radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo);
        /* move reserved to wait list */
        foreach_s(dma_bo, temp, &rmesa->dma.reserved) {
                /* free objects that are too small to be used because of large request */
@@ -403,11 +395,12 @@ void rcommon_flush_last_swtcl_prim( GLcontext *ctx  )
        radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
        struct radeon_dma *dma = &rmesa->dma;
                
-
        if (RADEON_DEBUG & RADEON_IOCTL)
                fprintf(stderr, "%s\n", __FUNCTION__);
        dma->flush = NULL;
 
+       radeon_bo_unmap(rmesa->swtcl.bo);
+
        if (!is_empty_list(&dma->reserved)) {
            GLuint current_offset = dma->current_used;
 
@@ -422,6 +415,8 @@ void rcommon_flush_last_swtcl_prim( GLcontext *ctx  )
            }
            rmesa->swtcl.numverts = 0;
        }
+       radeon_bo_unref(rmesa->swtcl.bo);
+       rmesa->swtcl.bo = NULL;
 }
 /* Alloc space in the current dma region.
  */
@@ -432,6 +427,7 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize )
        void *head;
        if (RADEON_DEBUG & RADEON_IOCTL)
                fprintf(stderr, "%s\n", __FUNCTION__);
+
        if(is_empty_list(&rmesa->dma.reserved)
              ||rmesa->dma.current_vertexptr + bytes > first_elem(&rmesa->dma.reserved)->bo->size) {
                if (rmesa->dma.flush) {
@@ -455,7 +451,11 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize )
                 rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 ==
                 rmesa->dma.current_vertexptr );
 
-       head = (first_elem(&rmesa->dma.reserved)->bo->ptr + rmesa->dma.current_vertexptr);
+       rmesa->swtcl.bo = first_elem(&rmesa->dma.reserved)->bo;
+       radeon_bo_ref(rmesa->swtcl.bo);
+       radeon_bo_map(rmesa->swtcl.bo, 1);
+
+       head = (rmesa->swtcl.bo->ptr + rmesa->dma.current_vertexptr);
        rmesa->dma.current_vertexptr += bytes;
        rmesa->swtcl.numverts += nverts;
        return head;

diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
index de18d2ddd60aa3476e3c7797d8340ff2e8f22785..d810e6080eb786d38f4bb440c705ce1e25f6d117 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
@@ -76,12 +76,14 @@ static void emit_vecfog(GLcontext *ctx, struct radeon_aos *aos,
 
    /* Emit the data
     */
+   radeon_bo_map(aos->bo, 1);
    out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
    for (i = 0; i < count; i++) {
       out[0] = radeonComputeFogBlendFactor( ctx, *(GLfloat *)data );
       out++;
       data += stride;
    }
+   radeon_bo_unmap(aos->bo);
 }
 
 static void emit_s0_vec(uint32_t *out, GLvoid *data, int stride, int count)
@@ -151,6 +153,7 @@ static void emit_tex_vector(GLcontext *ctx, struct radeon_aos *aos,
 
    /* Emit the data
     */
+   radeon_bo_map(aos->bo, 1);
    out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
    switch (size) {
    case 1:
@@ -170,6 +173,7 @@ static void emit_tex_vector(GLcontext *ctx, struct radeon_aos *aos,
       exit(1);
       break;
    }
+   radeon_bo_unmap(aos->bo);
 }
 
 

diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
index 5ed11d0a9db6ac94bef48bb382982aa193e16345..98f96ff2a768962b3f4de84ebafca8cfd484f744 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
@@ -420,10 +420,10 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
    }
 
 
-
+   radeon_bo_map(rmesa->radeon.tcl.aos[0].bo, 1);
    setup_tab[i].emit( ctx, 0, VB->Count, 
                      rmesa->radeon.tcl.aos[0].bo->ptr + rmesa->radeon.tcl.aos[0].offset);
-
+   radeon_bo_unmap(rmesa->radeon.tcl.aos[0].bo);
    //   rmesa->radeon.tcl.aos[0].size = setup_tab[i].vertex_size;
    rmesa->radeon.tcl.aos[0].stride = setup_tab[i].vertex_size;
    rmesa->tcl.vertex_format = setup_tab[i].vertex_format;

diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index 6bbe8e252ede19f6e22956faea46fb57d3feeaa8..8bf1bfbc5752d4c38840dd4d926dbd80a8a16806 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -309,7 +309,7 @@ void r100_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
    radeonEmitState(&rmesa->radeon);
    radeonEmitVertexAOS( rmesa,
                        rmesa->radeon.swtcl.vertex_size,
-                       first_elem(&rmesa->radeon.dma.reserved)->bo,
+                       rmesa->radeon.swtcl.bo,
                        current_offset);