i965/gen8+: Do full stall when switching pipeline
authorTopi Pohjolainen <topi.pohjolainen@intel.com>
Wed, 15 Mar 2017 19:31:07 +0000 (21:31 +0200)
committerTopi Pohjolainen <topi.pohjolainen@intel.com>
Thu, 16 Mar 2017 16:44:15 +0000 (18:44 +0200)
just as earlier gens do.

CC: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96743
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
src/mesa/drivers/dri/i965/brw_misc_state.c

index 84f0c188b87e9e3b0a719acd3eecf2df8e895cd1..1cf6b04e05f43cecd6037f6ecb169bacb469554a 100644 (file)
@@ -843,8 +843,9 @@ brw_emit_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline)
 
          brw->ctx.NewDriverState |= BRW_NEW_CC_STATE;
       }
+   }
 
-   } else if (brw->gen >= 6) {
+   if (brw->gen >= 6) {
       /* From "BXML » GT » MI » vol1a GPU Overview » [Instruction]
        * PIPELINE_SELECT [DevBWR+]":
        *