cpu: Disable MinorCPU value forwarding with write strobes
authorGabor Dozsa <gabor.dozsa@arm.com>
Wed, 23 Jan 2019 15:15:16 +0000 (15:15 +0000)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Fri, 3 Jan 2020 08:17:22 +0000 (08:17 +0000)
Change-Id: I7cb50b80b70fcf43ab23eb9e7333d16328993fe1
Signed-off-by: Gabor Dozsa <gabor.dozsa@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19173
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/cpu/minor/lsq.cc

index dea776c9e028631a03ffc953a1c5237109741761..8bbda030cc727080475d48cdd4b327c0e0d5484c 100644 (file)
@@ -142,10 +142,18 @@ LSQ::LSQRequest::containsAddrRangeOf(
 LSQ::AddrRangeCoverage
 LSQ::LSQRequest::containsAddrRangeOf(LSQRequestPtr other_request)
 {
-    return containsAddrRangeOf(request->getPaddr(), request->getSize(),
+    AddrRangeCoverage ret = containsAddrRangeOf(
+        request->getPaddr(), request->getSize(),
         other_request->request->getPaddr(), other_request->request->getSize());
+    /* If there is a strobe mask then store data forwarding might not be
+     * correct. Instead of checking enablemant of every byte we just fall back
+     * to PartialAddrRangeCoverage to prohibit store data forwarding */
+    if (ret == FullAddrRangeCoverage && request->isMasked())
+        ret = PartialAddrRangeCoverage;
+    return ret;
 }
 
+
 bool
 LSQ::LSQRequest::isBarrier()
 {