gallium/radeon: use a top-of-pipe timestamp for the start of TIME_ELAPSED

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/amd/common/r600d_common.h b/src/amd/common/r600d_common.h
index 3fdfb7c695f70d38d9748c910c182b67f01fee45..33744753368a174e9ac27d706ff96de5f64e6a9f 100644 (file)
--- a/src/amd/common/r600d_common.h
+++ b/src/amd/common/r600d_common.h
@@ -54,6 +54,17 @@
 #define PKT3_WAIT_REG_MEM                      0x3C
 #define                WAIT_REG_MEM_EQUAL              3
 #define         WAIT_REG_MEM_MEM_SPACE(x)       (((unsigned)(x) & 0x3) << 4)
+#define PKT3_COPY_DATA                        0x40
+#define                COPY_DATA_SRC_SEL(x)            ((x) & 0xf)
+#define                        COPY_DATA_REG           0
+#define                        COPY_DATA_MEM           1
+#define                 COPY_DATA_PERF          4
+#define                 COPY_DATA_IMM           5
+#define                 COPY_DATA_TIMESTAMP     9
+#define                COPY_DATA_DST_SEL(x)            (((unsigned)(x) & 0xf) << 8)
+#define                 COPY_DATA_MEM_ASYNC     5
+#define                COPY_DATA_COUNT_SEL             (1 << 16)
+#define                COPY_DATA_WR_CONFIRM            (1 << 20)
 #define PKT3_EVENT_WRITE                       0x46
 #define PKT3_EVENT_WRITE_EOP                   0x47
 #define         EOP_DATA_SEL(x)                         ((x) << 29)

diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c
index 9878745edc848e7226c3e47ec30b549b4b601b4d..61fd6626b97ab7db693aaf6406c3ff05fe81edae 100644 (file)
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -689,8 +689,25 @@ static void r600_query_hw_do_emit_start(struct r600_common_context *ctx,
                radeon_emit(cs, va >> 32);
                break;
        case PIPE_QUERY_TIME_ELAPSED:
-               r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS,
-                                        0, 3, NULL, va, 0, 0);
+               if (ctx->chip_class >= SI) {
+                       /* Write the timestamp from the CP not waiting for
+                        * outstanding draws (top-of-pipe).
+                        */
+                       radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
+                       radeon_emit(cs, COPY_DATA_COUNT_SEL |
+                                       COPY_DATA_SRC_SEL(COPY_DATA_TIMESTAMP) |
+                                       COPY_DATA_DST_SEL(COPY_DATA_MEM_ASYNC));
+                       radeon_emit(cs, 0);
+                       radeon_emit(cs, 0);
+                       radeon_emit(cs, va);
+                       radeon_emit(cs, va >> 32);
+               } else {
+                       /* Write the timestamp after the last draw is done.
+                        * (bottom-of-pipe)
+                        */
+                       r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS,
+                                                0, 3, NULL, va, 0, 0);
+               }
                break;
        case PIPE_QUERY_PIPELINE_STATISTICS:
                radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));