vsli_n.c: Add checks for vsliq_n_s64 and vsliq_n_u64.

* gcc.target/aarch64/advsimd-intrinsics/vsli_n.c: Add checks for vsliq_n_s64 and vsliq_n_u64.

From-SVN: r236385

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 38394cb70437412c48692e98b96b1a68f13cb405..77baf87fdfea7384f1bd4245ec8d0fe49944e242 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>
+
+       * gcc.target/aarch64/advsimd-intrinsics/vsli_n.c: Add checks for
+       vsliq_n_s64 and vsliq_n_u64.
+
 2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>
 
        * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (CHECK,

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsli_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsli_n.c
index 0285083425d676b8eef054bb0496b69319d7b63f..91115e5f4266e76462e71bcc5543ad85613c6453 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsli_n.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsli_n.c
@@ -166,9 +166,11 @@ void vsli_extra(void)
   CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shift, COMMENT);
   CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shift, COMMENT);
   CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shift, COMMENT);
+  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_shift, COMMENT);
   CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_shift, COMMENT);
   CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shift, COMMENT);
   CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shift, COMMENT);
+  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_shift, COMMENT);
   CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_max_shift, COMMENT);
   CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_max_shift, COMMENT);
 }