Fix writemasks on texture arb fp instructions.
authorAlan Hourihane <alanh@tungstengraphics.com>
Fri, 18 Aug 2006 09:04:48 +0000 (09:04 +0000)
committerAlan Hourihane <alanh@tungstengraphics.com>
Fri, 18 Aug 2006 09:04:48 +0000 (09:04 +0000)
Cleanup invarient state emission.

src/mesa/drivers/dri/i915/i830_context.h
src/mesa/drivers/dri/i915/i830_metaops.c
src/mesa/drivers/dri/i915/i830_vtbl.c
src/mesa/drivers/dri/i915/i915_context.h
src/mesa/drivers/dri/i915/i915_metaops.c
src/mesa/drivers/dri/i915/i915_program.c
src/mesa/drivers/dri/i915/i915_state.c
src/mesa/drivers/dri/i915/i915_vtbl.c
src/mesa/drivers/dri/i915/intel_batchbuffer.c
src/mesa/drivers/dri/i915/intel_context.c
src/mesa/drivers/dri/i915/intel_context.h

index d5811e6c349112bb2ff3a9e0b703326c16da1ff9..bae777dd5a4ed35f3d357a4fb2cf0f497471bb24 100644 (file)
@@ -39,6 +39,7 @@
 #define I830_UPLOAD_CTX              0x1
 #define I830_UPLOAD_BUFFERS          0x2
 #define I830_UPLOAD_STIPPLE          0x4
+#define I830_UPLOAD_INVARIENT        0x8
 #define I830_UPLOAD_TEX(i)           (0x10<<(i))
 #define I830_UPLOAD_TEXBLEND(i)      (0x100<<(i))
 #define I830_UPLOAD_TEX_ALL          (0x0f0)
index e7215dfaf09b6d1f015297c6efc1e0269c517a8f..17fde2f4804c11cf17253061f2b364e4314ca7de 100644 (file)
@@ -40,7 +40,8 @@
 
 /* A large amount of state doesn't need to be uploaded.
  */
-#define ACTIVE (I830_UPLOAD_TEXBLEND(0) |      \
+#define ACTIVE (I830_UPLOAD_INVARIENT |         \
+               I830_UPLOAD_TEXBLEND(0) |       \
                I830_UPLOAD_STIPPLE |           \
                I830_UPLOAD_CTX |               \
                I830_UPLOAD_BUFFERS |           \
index 9e71b11109161afa782cc7bea3a4b1f397f3b97d..d40cf705a354bd127ac8dd979383d0d0b227a1b6 100644 (file)
@@ -264,7 +264,7 @@ static void i830_emit_invarient_state( intelContextPtr intel )
 {
    BATCH_LOCALS;
 
-   BEGIN_BATCH( 200 );
+   BEGIN_BATCH( 40 );
 
    OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(0));
    OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(1));
@@ -370,6 +370,9 @@ static GLuint get_state_size( struct i830_hw_state *state )
    GLuint sz = 0;
    GLuint i;
 
+   if (dirty & I830_UPLOAD_INVARIENT)
+      sz += 40 * sizeof(int);
+
    if (dirty & I830_UPLOAD_CTX) 
       sz += sizeof(state->Ctx);
 
@@ -408,6 +411,11 @@ static void i830_emit_state( intelContextPtr intel )
       counter = intel->batch.counter;
    }
 
+   if (dirty & I830_UPLOAD_INVARIENT) {
+      if (VERBOSE) fprintf(stderr, "I830_UPLOAD_INVARIENT:\n"); 
+      i830_emit_invarient_state( intel );
+   }
+
    if (dirty & I830_UPLOAD_CTX) {
       if (VERBOSE) fprintf(stderr, "I830_UPLOAD_CTX:\n"); 
       emit( i830, state->Ctx, sizeof(state->Ctx) );
@@ -514,7 +522,6 @@ void i830InitVtbl( i830ContextPtr i830 )
    i830->intel.vtbl.clear_with_tris = i830ClearWithTris;
    i830->intel.vtbl.rotate_window = i830RotateWindow;
    i830->intel.vtbl.destroy = i830_destroy_context;
-   i830->intel.vtbl.emit_invarient_state = i830_emit_invarient_state;
    i830->intel.vtbl.emit_state = i830_emit_state;
    i830->intel.vtbl.lost_hardware = i830_lost_hardware;
    i830->intel.vtbl.reduced_primitive_state = i830_reduced_primitive_state;
index 761a475714dfe038a7866586403e67058ffe1b04..ec1550126a6efb66b66cdc26d506814df8797735 100644 (file)
@@ -45,6 +45,7 @@
 #define I915_UPLOAD_PROGRAM          0x8
 #define I915_UPLOAD_CONSTANTS        0x10
 #define I915_UPLOAD_FOG              0x20
+#define I915_UPLOAD_INVARIENT        0x40
 #define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
 #define I915_UPLOAD_TEX_ALL          (0x00ff0000)
 #define I915_UPLOAD_TEX_0_SHIFT      16
index f7b8e5415ea7c29013ca9a08dbb928cf61a42b19..3ab5dbfd68531b91326fb48f7d971c54a5eed69f 100644 (file)
@@ -41,7 +41,8 @@
 
 /* A large amount of state doesn't need to be uploaded.
  */
-#define ACTIVE (I915_UPLOAD_PROGRAM |          \
+#define ACTIVE (I915_UPLOAD_INVARIENT |         \
+               I915_UPLOAD_PROGRAM |           \
                I915_UPLOAD_STIPPLE |           \
                I915_UPLOAD_CTX |               \
                I915_UPLOAD_BUFFERS |           \
index 45276fb6908ccbfe9abfe55b51d5fc1439c7f676..0faadb4f1a740c79e7f85be3f870c8a934537df3 100644 (file)
@@ -195,29 +195,47 @@ GLuint i915_emit_arith( struct i915_fragment_program *p,
 }
 
 GLuint i915_emit_texld( struct i915_fragment_program *p,
-                         GLuint dest,
-                         GLuint destmask,
-                         GLuint sampler,
-                         GLuint coord,
-                         GLuint op )
+                       GLuint dest,
+                       GLuint destmask,
+                       GLuint sampler,
+                       GLuint coord,
+                       GLuint op )
 {
-   assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
-   assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
+   if (coord != UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord))) {
+      /* No real way to work around this in the general case - need to
+       * allocate and declare a new temporary register (a utemp won't
+       * do).  Will fallback for now.
+       */
+      i915_program_error(p, "Can't (yet) swizzle TEX arguments");
+      return 0;
+   }
 
-   if (GET_UREG_TYPE(coord) != REG_TYPE_T) {
-      p->nr_tex_indirect++;
+   /* Don't worry about saturate as we only support  
+    */
+   if (destmask != A0_DEST_CHANNEL_ALL) {
+      GLuint tmp = i915_get_utemp(p);
+      i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, op );
+      i915_emit_arith( p, A0_MOV, dest, destmask, 0, tmp, 0, 0 );
+      return dest;
    }
+   else {
+      assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
+      assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
 
-   *(p->csr++) = (op | 
-                 T0_DEST( dest ) |
-                 destmask |
-                 T0_SAMPLER( sampler ));
+      if (GET_UREG_TYPE(coord) != REG_TYPE_T) {
+        p->nr_tex_indirect++;
+      }
 
-   *(p->csr++) = T1_ADDRESS_REG( coord );
-   *(p->csr++) = T2_MBZ;
+      *(p->csr++) = (op | 
+                    T0_DEST( dest ) |
+                    T0_SAMPLER( sampler ));
 
-   p->nr_tex_insn++;
-   return dest;
+      *(p->csr++) = T1_ADDRESS_REG( coord );
+      *(p->csr++) = T2_MBZ;
+
+      p->nr_tex_insn++;
+      return dest;
+   }
 }
 
 
index bad947f5de53b5033ed241fdec419658d607a611..db5bb9ddc78271d4ad3c7f21d17bc3849c0dd25d 100644 (file)
@@ -919,9 +919,10 @@ static void i915_init_packets( i915ContextPtr i915 )
     * we get hardware contexts working.
     */
    i915->state.active = (I915_UPLOAD_PROGRAM | 
-                       I915_UPLOAD_STIPPLE | 
-                       I915_UPLOAD_CTX | 
-                       I915_UPLOAD_BUFFERS);
+                        I915_UPLOAD_STIPPLE | 
+                        I915_UPLOAD_CTX | 
+                        I915_UPLOAD_BUFFERS | 
+                        I915_UPLOAD_INVARIENT);
 }
 
 void i915InitStateFunctions( struct dd_function_table *functions )
index 25575e5ed26b897145471ed6442ebee05ff58ee5..9ec54de23c529d1fda58efe86eeaa7308ddb7c47 100644 (file)
@@ -136,7 +136,7 @@ static void i915_emit_invarient_state( intelContextPtr intel )
 {
    BATCH_LOCALS;
 
-   BEGIN_BATCH( 200 );
+   BEGIN_BATCH( 20 );
 
    OUT_BATCH(_3DSTATE_AA_CMD |
             AA_LINE_ECAAR_WIDTH_ENABLE |
@@ -235,6 +235,9 @@ static GLuint get_state_size( struct i915_hw_state *state )
    GLuint i;
    GLuint sz = 0;
 
+   if (dirty & I915_UPLOAD_INVARIENT)
+      sz += 20 * sizeof(int);
+
    if (dirty & I915_UPLOAD_CTX)
       sz += sizeof(state->Ctx);
 
@@ -286,6 +289,11 @@ static void i915_emit_state( intelContextPtr intel )
    if (VERBOSE) 
       fprintf(stderr, "%s dirty: %x\n", __FUNCTION__, dirty);
 
+   if (dirty & I915_UPLOAD_INVARIENT) {
+      if (VERBOSE) fprintf(stderr, "I915_UPLOAD_INVARIENT:\n"); 
+      i915_emit_invarient_state( intel );
+   }
+
    if (dirty & I915_UPLOAD_CTX) {
       if (VERBOSE) fprintf(stderr, "I915_UPLOAD_CTX:\n"); 
       emit( i915, state->Ctx, sizeof(state->Ctx) );
@@ -439,7 +447,6 @@ void i915InitVtbl( i915ContextPtr i915 )
    i915->intel.vtbl.clear_with_tris = i915ClearWithTris;
    i915->intel.vtbl.rotate_window = i915RotateWindow;
    i915->intel.vtbl.destroy = i915_destroy_context;
-   i915->intel.vtbl.emit_invarient_state = i915_emit_invarient_state;
    i915->intel.vtbl.emit_state = i915_emit_state;
    i915->intel.vtbl.lost_hardware = i915_lost_hardware;
    i915->intel.vtbl.reduced_primitive_state = i915_reduced_primitive_state;
index 06312372776c06c1e7da2263194f32b3d8fc4e69..1dfaa2d59dc1b90dc7d03f06aa8bc05d20ea4081 100644 (file)
@@ -384,8 +384,8 @@ void intelCopyBuffer( const __DRIdrawablePrivate *dPriv,
 
    intelFlush( &intel->ctx );
    
-   LOCK_HARDWARE( intel );
    intelWaitForFrameCompletion( intel );
+   LOCK_HARDWARE( intel );
 
    if (!rect)
    {
index 54b0960c565d3354fa27bea083bf434ea2b7ca71..6597a71047e87af6f403d2a8d09b878e73457c34 100644 (file)
@@ -279,16 +279,6 @@ void intelInitDriverFunctions( struct dd_function_table *functions )
 
 static void intel_emit_invarient_state( GLcontext *ctx )
 {
-   intelContextPtr intel = INTEL_CONTEXT(ctx);
-
-   intel->vtbl.emit_invarient_state( intel );
-   intel->prim.flush = 0;
-
-   /* Make sure this gets to the hardware, even if we have no cliprects:
-    */
-   LOCK_HARDWARE( intel );
-   intelFlushBatchLocked( intel, GL_TRUE, GL_FALSE, GL_TRUE );
-   UNLOCK_HARDWARE( intel );
 }
 
 
index 19213b7bc55c731b3ad66c66260b6fba3a6173b9..0ca8ff268de4aac8ee2eabbecb333d580017ceba 100644 (file)
@@ -107,7 +107,6 @@ struct intel_context
    struct {
       void (*destroy)( intelContextPtr intel ); 
       void (*emit_state)( intelContextPtr intel );
-      void (*emit_invarient_state)( intelContextPtr intel );
       void (*lost_hardware)( intelContextPtr intel );
       void (*update_texture_state)( intelContextPtr intel );