if (res->ptr)
os_munmap(res->ptr, res->size);
+ memset(&args, 0, sizeof(args));
args.handle = res->bo_handle;
drmIoctl(qdws->fd, DRM_IOCTL_GEM_CLOSE, &args);
FREE(res);
struct drm_virtgpu_3d_wait waitcmd;
int ret;
+ memset(&waitcmd, 0, sizeof(waitcmd));
waitcmd.handle = res->bo_handle;
waitcmd.flags = VIRTGPU_WAIT_NOWAIT;
if (!res)
return NULL;
+ memset(&createcmd, 0, sizeof(createcmd));
createcmd.target = target;
createcmd.format = format;
createcmd.bind = bind;
createcmd.array_size = array_size;
createcmd.last_level = last_level;
createcmd.nr_samples = nr_samples;
- createcmd.res_handle = 0;
createcmd.stride = stride;
createcmd.size = size;
- createcmd.flags = 0;
ret = drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_RESOURCE_CREATE, &createcmd);
if (ret != 0) {
struct drm_virtgpu_3d_transfer_to_host tohostcmd;
int ret;
+ memset(&tohostcmd, 0, sizeof(tohostcmd));
tohostcmd.bo_handle = res->bo_handle;
tohostcmd.box = *(struct drm_virtgpu_3d_box *)box;
tohostcmd.offset = buf_offset;
struct drm_virtgpu_3d_transfer_from_host fromhostcmd;
int ret;
+ memset(&fromhostcmd, 0, sizeof(fromhostcmd));
fromhostcmd.bo_handle = res->bo_handle;
fromhostcmd.level = level;
fromhostcmd.offset = buf_offset;
if (!res)
return FALSE;
- memset(&flink, 0, sizeof(flink));
if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
if (!res->flinked) {
+ memset(&flink, 0, sizeof(flink));
flink.handle = res->bo_handle;
if (drmIoctl(qdws->fd, DRM_IOCTL_GEM_FLINK, &flink)) {
if (res->ptr)
return res->ptr;
+ memset(&mmap_arg, 0, sizeof(mmap_arg));
mmap_arg.handle = res->bo_handle;
if (drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_MAP, &mmap_arg))
return NULL;
struct drm_virtgpu_3d_wait waitcmd;
int ret;
+ memset(&waitcmd, 0, sizeof(waitcmd));
waitcmd.handle = res->bo_handle;
- waitcmd.flags = 0;
again:
ret = drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_WAIT, &waitcmd);
if (ret == -EAGAIN)