(no commit message)

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index bc52f0af7a43ebb0073d2dfb9ca03b20631c7805..86d1589eb33d0e1de7fa92b9a47a816fd704dbb3 100644 (file)
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -116,6 +116,10 @@ unaffected by their SVP64 variants in every conceivable way.
 
 # Format and fields
 
+With element-width overrides being meaningless for Condition
+Register Fields, bits 4 thru 7 of SVP64 RM may be used for additional
+Mode bits.
+
 SVP64 RM `MODE` (includes `ELWIDTH` and `ELWIDTH_SRC` bits) for Branch
 Conditional: