MIPS/GAS: Unify GP-relative percent-ops

For a reason that is unclear commit d6f165938798 ("Support for MIPS16
HI16/LO16 relocations"),
<https://sourceware.org/ml/binutils/2005-02/msg00332.html>, which has
added support for the R_MIPS16_GPREL relocation, has spelled its
corresponding MIPS16 percent-op as `%gprel', rather than `%gp_rel' which
is how its regular MIPS counterpart is spelled.  To make assembly code
sharing easier between the regular MIPS and the MIPS16 ISA make both
percent-op spellings acceptable in both kinds of code now.

Parts of this change by Matthew Fortune.

	gas/
	* config/tc-mips.c (mips_percent_op): Add "%gprel".
	(mips16_percent_op): Add "%gp_rel".
	* testsuite/gas/mips/elf-rel8.s:: Add `%gprel' forms.
	* testsuite/gas/mips/elf-rel8-mips16.s: Add `%gp_rel' forms.
	* testsuite/gas/mips/elf-rel8.d: Adjust accordingly.
	* testsuite/gas/mips/elf-rel8-mips16.d: Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 559e9e5ae9254e87801739ac65f154f7983ea174..865142e3ac18e9f095d0463c9539fbfa8430e8c9 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,13 @@
+2017-05-12  Maciej W. Rozycki  <macro@imgtec.com>
+           Matthew Fortune  <matthew.fortune@imgtec.com>
+
+       * config/tc-mips.c (mips_percent_op): Add "%gprel".
+       (mips16_percent_op): Add "%gp_rel".
+       * testsuite/gas/mips/elf-rel8.s:: Add `%gprel' forms.
+       * testsuite/gas/mips/elf-rel8-mips16.s: Add `%gp_rel' forms.
+       * testsuite/gas/mips/elf-rel8.d: Adjust accordingly.
+       * testsuite/gas/mips/elf-rel8-mips16.d: Likewise.
+
 2017-05-12  Maciej W. Rozycki  <macro@imgtec.com>
 
        * testsuite/gas/mips/mips16.d: Adjust BREAK disassembly.

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 4ead2097993d3c9b22c92035b18009ca22e3697f..e73b9c94f3ee284b8152c0291caf0ad4dbb9513d 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -14094,6 +14094,7 @@ static const struct percent_op_match mips_percent_op[] =
   {"%got_lo", BFD_RELOC_MIPS_GOT_LO16},
   {"%got", BFD_RELOC_MIPS_GOT16},
   {"%gp_rel", BFD_RELOC_GPREL16},
+  {"%gprel", BFD_RELOC_GPREL16},
   {"%half", BFD_RELOC_16},
   {"%highest", BFD_RELOC_MIPS_HIGHEST},
   {"%higher", BFD_RELOC_MIPS_HIGHER},
@@ -14113,6 +14114,7 @@ static const struct percent_op_match mips_percent_op[] =
 static const struct percent_op_match mips16_percent_op[] =
 {
   {"%lo", BFD_RELOC_MIPS16_LO16},
+  {"%gp_rel", BFD_RELOC_MIPS16_GPREL},
   {"%gprel", BFD_RELOC_MIPS16_GPREL},
   {"%got", BFD_RELOC_MIPS16_GOT16},
   {"%call16", BFD_RELOC_MIPS16_CALL16},

diff --git a/gas/testsuite/gas/mips/elf-rel8-mips16.d b/gas/testsuite/gas/mips/elf-rel8-mips16.d
index 7c834fa5d2b6ddca13910d372fd8f80c9bb05ee8..f1def80a061b4b5705135f7788bad1a38a94f7b2 100644 (file)
--- a/gas/testsuite/gas/mips/elf-rel8-mips16.d
+++ b/gas/testsuite/gas/mips/elf-rel8-mips16.d
@@ -34,5 +34,11 @@ Disassembly of section \.text:
                        32: R_MIPS16_GPREL      gvar
   36:  f000 4c00       addiu   \$4,0
                        36: R_MIPS16_GPREL      gvar
-  3a:  6500            nop
+  3a:  f000 9a80       lw      \$4,0\(\$2\)
+                       3a: R_MIPS16_GPREL      gvar
+  3e:  f000 da80       sw      \$4,0\(\$2\)
+                       3e: R_MIPS16_GPREL      gvar
+  42:  f000 4c00       addiu   \$4,0
+                       42: R_MIPS16_GPREL      gvar
+  46:  6500            nop
 #pass

diff --git a/gas/testsuite/gas/mips/elf-rel8-mips16.s b/gas/testsuite/gas/mips/elf-rel8-mips16.s
index 0c9eefe652fbb6411bced0de3c4a6404361bc970..dfde21acf448a1e496bea27d309833703fced989 100644 (file)
--- a/gas/testsuite/gas/mips/elf-rel8-mips16.s
+++ b/gas/testsuite/gas/mips/elf-rel8-mips16.s
@@ -32,6 +32,13 @@ foo:
        lw      $4,%gprel(gvar)($2)
        sw      $4,%gprel(gvar)($2)
        addiu   $4,%gprel(gvar)
+
+       # Check the alternative form.
+
+       lw      $4,%gp_rel(gvar)($2)
+       sw      $4,%gp_rel(gvar)($2)
+       addiu   $4,%gp_rel(gvar)
+
        .align  6
        .end    foo
 

diff --git a/gas/testsuite/gas/mips/elf-rel8.d b/gas/testsuite/gas/mips/elf-rel8.d
index 270533b2883286ebc7f8d61213e38a6d98626c3e..beacecf2c5326d560182f08998082ad4af029747 100644 (file)
--- a/gas/testsuite/gas/mips/elf-rel8.d
+++ b/gas/testsuite/gas/mips/elf-rel8.d
@@ -54,4 +54,10 @@ Disassembly of section \.text:
                        5c: R_MIPS_GPREL16      gvar
   60:  27840000        addiu   \$4,\$28,0
                        60: R_MIPS_GPREL16      gvar
+  64:  8f840000        lw      \$4,0\(\$28\)
+                       64: R_MIPS_GPREL16      gvar
+  68:  af840000        sw      \$4,0\(\$28\)
+                       68: R_MIPS_GPREL16      gvar
+  6c:  27840000        addiu   \$4,\$28,0
+                       6c: R_MIPS_GPREL16      gvar
        \.\.\.

diff --git a/gas/testsuite/gas/mips/elf-rel8.s b/gas/testsuite/gas/mips/elf-rel8.s
index b3f5dab58d6b577f184497280525e1d76cd11296..4a84beec41e0c3d37769bf3dfa2e210cab590974 100644 (file)
--- a/gas/testsuite/gas/mips/elf-rel8.s
+++ b/gas/testsuite/gas/mips/elf-rel8.s
@@ -46,6 +46,12 @@ foo:
        sw      $4,%gp_rel(gvar)($28)
        addiu   $4,$28,%gp_rel(gvar)
 
+       # Check the alternative form.
+
+       lw      $4,%gprel(gvar)($28)
+       sw      $4,%gprel(gvar)($28)
+       addiu   $4,$28,%gprel(gvar)
+
        .space  64
        .end    foo