scalar vector architectures

diff --git a/svp64-primer/summary.tex b/svp64-primer/summary.tex
index 2dd482882355345626b350ff9c97977d33fcfea1..0b613e0c3ba4d8c2ef168f1e4c716ac016cdc65a 100644 (file)
--- a/svp64-primer/summary.tex
+++ b/svp64-primer/summary.tex
@@ -98,7 +98,7 @@ the number of instructions increase:
        Multi-issue decoding
 \end{itemize}
 
-\subsection{Vector Architectures}
+\subsection{Scalable Vector Architectures}
 An older alternative exists to utilise data parallelism - vector
 architectures. Vector CPUs collect operands from the main memory, and
 store them in large, sequential vector registers.\par