projects
/
yosys.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
893fe87
)
no support for 6-series xilinx devices
author
Clifford Wolf
<clifford@clifford.at>
Sun, 1 Feb 2015 22:06:44 +0000
(23:06 +0100)
committer
Clifford Wolf
<clifford@clifford.at>
Sun, 1 Feb 2015 22:06:44 +0000
(23:06 +0100)
techlibs/xilinx/synth_xilinx.cc
patch
|
blob
|
history
diff --git
a/techlibs/xilinx/synth_xilinx.cc
b/techlibs/xilinx/synth_xilinx.cc
index caa7e205d1771f1d4f842ed88cb0ef215dc0e4dc..7812fa29014cc9e54f6af028f4368f5c5e7db13c 100644
(file)
--- a/
techlibs/xilinx/synth_xilinx.cc
+++ b/
techlibs/xilinx/synth_xilinx.cc
@@
-44,7
+44,7
@@
struct SynthXilinxPass : public Pass {
log("\n");
log("This command runs synthesis for Xilinx FPGAs. This command does not operate on\n");
log("partly selected designs. At the moment this command creates netlists that are\n");
- log("compatible with 7-
series and 6-s
eries Xilinx devices.\n");
+ log("compatible with 7-
S
eries Xilinx devices.\n");
log("\n");
log(" -top <module>\n");
log(" use the specified module as top module (default='top')\n");