2019-01-22 Jakub Jelinek <jakub@redhat.com>
+ PR rtl-optimization/88904
+ * cfgcleanup.c (thread_jump): Verify cond2 doesn't mention
+ any nonequal registers before processing BB_END (b).
+
PR target/88905
* optabs.c (add_equal_note): Add op0_mode argument, use it instead of
GET_MODE (op0).
insn != NEXT_INSN (BB_END (b)) && !failed;
insn = NEXT_INSN (insn))
{
+ /* cond2 must not mention any register that is not equal to the
+ former block. Check this before processing that instruction,
+ as BB_END (b) could contain also clobbers. */
+ if (insn == BB_END (b)
+ && mentions_nonequal_regs (cond2, nonequal))
+ goto failed_exit;
+
if (INSN_P (insn))
{
rtx pat = PATTERN (insn);
goto failed_exit;
}
- /* cond2 must not mention any register that is not equal to the
- former block. */
- if (mentions_nonequal_regs (cond2, nonequal))
- goto failed_exit;
-
EXECUTE_IF_SET_IN_REG_SET (nonequal, 0, i, rsi)
goto failed_exit;
2019-01-22 Jakub Jelinek <jakub@redhat.com>
+ PR rtl-optimization/88904
+ * gcc.c-torture/execute/pr88904.c: New test.
+
PR target/88905
* gcc.dg/pr88905.c: New test.
--- /dev/null
+/* PR rtl-optimization/88904 */
+
+volatile int v;
+
+__attribute__((noipa)) void
+bar (const char *x, const char *y, int z)
+{
+ if (!v)
+ __builtin_abort ();
+ asm volatile ("" : "+g" (x));
+ asm volatile ("" : "+g" (y));
+ asm volatile ("" : "+g" (z));
+}
+
+#define my_assert(e) ((e) ? (void) 0 : bar (#e, __FILE__, __LINE__))
+
+typedef struct {
+ unsigned M1;
+ unsigned M2 : 1;
+ int : 0;
+ unsigned M3 : 1;
+} S;
+
+S
+foo ()
+{
+ S result = {0, 0, 1};
+ return result;
+}
+
+int
+main ()
+{
+ S ret = foo ();
+ my_assert (ret.M2 == 0);
+ my_assert (ret.M3 == 1);
+ return 0;
+}