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nvc0: bump sched data member to 32-bits
authorBen Skeggs <bskeggs@redhat.com>
Fri, 9 May 2014 05:55:57 +0000 (15:55 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Wed, 14 May 2014 23:54:34 +0000 (09:54 +1000)
SM50 backend requires 21 bits per instruction, not 8.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
src/gallium/drivers/nouveau/codegen/nv50_ir.h patch | blob | history

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h
index 8872cfb7025521a8ddc8464ad74b674514c58c1d..f082f856ffc531e9ad2ae7c90c052c8144c17bf1 100644 (file)
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.h
@@ -792,7 +792,7 @@ public:
    int8_t flagsDef;
    int8_t flagsSrc;
 
-   uint8_t sched; // scheduling data (NOTE: maybe move to separate storage)
+   uint32_t sched; // scheduling data (NOTE: maybe move to separate storage)
 
    BasicBlock *bb;