}
}
-static enum mali_texture_layout
-panfrost_layout_for_texture(struct panfrost_resource *rsrc)
-{
- switch (rsrc->layout) {
- case PAN_AFBC:
- return MALI_TEXTURE_AFBC;
- case PAN_TILED:
- return MALI_TEXTURE_TILED;
- case PAN_LINEAR:
- return MALI_TEXTURE_LINEAR;
- default:
- unreachable("Invalid texture layout");
- }
-}
-
static mali_ptr
panfrost_upload_tex(
struct panfrost_context *ctx,
}
/* Lower-bit is set when sampling from colour AFBC */
- bool is_afbc = rsrc->layout == PAN_AFBC;
+ bool is_afbc = rsrc->layout == MALI_TEXTURE_AFBC;
bool is_zs = rsrc->base.bind & PIPE_BIND_DEPTH_STENCIL;
unsigned afbc_bit = (is_afbc && !is_zs) ? 1 : 0;
/* Add the usage flags in, since they can change across the CSO
* lifetime due to layout switches */
- view->hw.format.layout = panfrost_layout_for_texture(rsrc);
+ view->hw.format.layout = rsrc->layout;
view->hw.format.manual_stride = has_manual_stride;
/* Inject the addresses in, interleaving array indices, mip levels,
unsigned first_level = template->u.tex.first_level;
unsigned last_level = template->u.tex.last_level;
- if (prsrc->layout == PAN_LINEAR) {
+ if (prsrc->layout == MALI_TEXTURE_LINEAR) {
for (unsigned l = first_level; l <= last_level; ++l) {
unsigned actual_stride = prsrc->slices[l].stride;
unsigned width = u_minify(texture->width0, l);
for (unsigned i = 0; i < fb->nr_cbufs; ++i) {
struct pipe_surface *surf = fb->cbufs[i];
struct panfrost_resource *rsrc = pan_resource(surf->texture);
- panfrost_resource_hint_layout(screen, rsrc, PAN_AFBC, 1);
+ panfrost_resource_hint_layout(screen, rsrc, MALI_TEXTURE_AFBC, 1);
}
/* Also hint it to the depth buffer */
if (fb->zsbuf) {
struct panfrost_resource *rsrc = pan_resource(fb->zsbuf->texture);
- panfrost_resource_hint_layout(screen, rsrc, PAN_AFBC, 1);
+ panfrost_resource_hint_layout(screen, rsrc, MALI_TEXTURE_AFBC, 1);
}
}
/* Now, we set the layout specific pieces */
- if (rsrc->layout == PAN_LINEAR) {
+ if (rsrc->layout == MALI_TEXTURE_LINEAR) {
rt->format.block = MALI_BLOCK_LINEAR;
rt->framebuffer = base;
rt->framebuffer_stride = stride / 16;
- } else if (rsrc->layout == PAN_TILED) {
+ } else if (rsrc->layout == MALI_TEXTURE_TILED) {
rt->format.block = MALI_BLOCK_TILED;
rt->framebuffer = base;
rt->framebuffer_stride = stride;
- } else if (rsrc->layout == PAN_AFBC) {
+ } else if (rsrc->layout == MALI_TEXTURE_AFBC) {
rt->format.block = MALI_BLOCK_AFBC;
unsigned header_size = rsrc->slices[level].header_size;
mali_ptr base = panfrost_get_texture_address(rsrc, level, first_layer);
- if (rsrc->layout == PAN_AFBC) {
+ if (rsrc->layout == MALI_TEXTURE_AFBC) {
/* The only Z/S format we can compress is Z24S8 or variants
* thereof (handled by the state tracker) */
assert(panfrost_is_z24s8_variant(surf->format));
fbx->ds_afbc.zero1 = 0x10009;
fbx->ds_afbc.padding = 0x1000;
- } else if (rsrc->layout == PAN_LINEAR || rsrc->layout == PAN_TILED) {
+ } else if (rsrc->layout == MALI_TEXTURE_LINEAR || rsrc->layout == MALI_TEXTURE_TILED) {
/* TODO: Z32F(S8) support, which is always linear */
int stride = rsrc->slices[level].stride;
fbx->ds_linear.depth = base;
- if (rsrc->layout == PAN_LINEAR) {
+ if (rsrc->layout == MALI_TEXTURE_LINEAR) {
fbx->zs_block = MALI_BLOCK_LINEAR;
fbx->ds_linear.depth_stride = stride / 16;
} else {
rsc->bo = panfrost_bo_import(screen, whandle->handle);
rsc->internal_format = templat->format;
+ rsc->layout = MALI_TEXTURE_LINEAR;
rsc->slices[0].stride = whandle->stride;
rsc->slices[0].offset = whandle->offset;
rsc->slices[0].initialized = true;
bool renderable = res->bind &
(PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL);
- bool afbc = pres->layout == PAN_AFBC;
- bool tiled = pres->layout == PAN_TILED;
+ bool afbc = pres->layout == MALI_TEXTURE_AFBC;
+ bool tiled = pres->layout == MALI_TEXTURE_TILED;
bool should_align = renderable || tiled;
/* We don't know how to specify a 2D stride for 3D textures */
stride /= 4;
/* ..but cache-line align it for performance */
- if (can_align_stride && pres->layout == PAN_LINEAR)
+ if (can_align_stride && pres->layout == MALI_TEXTURE_LINEAR)
stride = ALIGN_POT(stride, 64);
slice->stride = stride;
/* Set the layout appropriately */
assert(!(must_tile && !can_tile)); /* must_tile => can_tile */
- pres->layout = ((can_tile && should_tile) || must_tile) ? PAN_TILED : PAN_LINEAR;
+ pres->layout = ((can_tile && should_tile) || must_tile) ? MALI_TEXTURE_TILED : MALI_TEXTURE_LINEAR;
size_t bo_size;
}
}
- if (rsrc->layout != PAN_LINEAR) {
+ if (rsrc->layout != MALI_TEXTURE_LINEAR) {
/* Non-linear resources need to be indirectly mapped */
if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
assert(box->depth == 1);
if ((usage & PIPE_TRANSFER_READ) && rsrc->slices[level].initialized) {
- if (rsrc->layout == PAN_AFBC) {
+ if (rsrc->layout == MALI_TEXTURE_AFBC) {
DBG("Unimplemented: reads from AFBC");
- } else if (rsrc->layout == PAN_TILED) {
+ } else if (rsrc->layout == MALI_TEXTURE_TILED) {
panfrost_load_tiled_image(
transfer->map,
bo->cpu + rsrc->slices[level].offset,
struct panfrost_bo *bo = prsrc->bo;
if (transfer->usage & PIPE_TRANSFER_WRITE) {
- if (prsrc->layout == PAN_AFBC) {
+ if (prsrc->layout == MALI_TEXTURE_AFBC) {
DBG("Unimplemented: writes to AFBC\n");
- } else if (prsrc->layout == PAN_TILED) {
+ } else if (prsrc->layout == MALI_TEXTURE_TILED) {
assert(transfer->box.depth == 1);
panfrost_store_tiled_image(
panfrost_resource_hint_layout(
struct panfrost_screen *screen,
struct panfrost_resource *rsrc,
- enum panfrost_memory_layout layout,
+ enum mali_texture_layout layout,
signed weight)
{
/* Nothing to do, although a sophisticated implementation might store
/* Check if the preferred layout is legal for this buffer */
- if (layout == PAN_AFBC) {
+ if (layout == MALI_TEXTURE_AFBC) {
bool can_afbc = panfrost_format_supports_afbc(rsrc->base.format);
bool is_scanout = rsrc->base.bind &
(PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT | PIPE_BIND_SHARED);
#include "drm-uapi/drm.h"
#include "util/u_range.h"
-/* Describes the memory layout of a BO */
-
-enum panfrost_memory_layout {
- PAN_LINEAR,
- PAN_TILED,
- PAN_AFBC
-};
-
struct panfrost_slice {
unsigned offset;
unsigned stride;
unsigned cubemap_stride;
/* Internal layout (tiled?) */
- enum panfrost_memory_layout layout;
+ enum mali_texture_layout layout;
/* Is transaciton elimination enabled? */
bool checksummed;
panfrost_resource_hint_layout(
struct panfrost_screen *screen,
struct panfrost_resource *rsrc,
- enum panfrost_memory_layout layout,
+ enum mali_texture_layout layout,
signed weight);
/* AFBC */
fb->framebuffer = base;
fb->stride = stride;
- if (rsrc->layout == PAN_LINEAR)
+ if (rsrc->layout == MALI_TEXTURE_LINEAR)
fb->format.block = MALI_BLOCK_LINEAR;
- else if (rsrc->layout == PAN_TILED) {
+ else if (rsrc->layout == MALI_TEXTURE_TILED) {
fb->format.block = MALI_BLOCK_TILED;
fb->stride *= 16;
} else {
unsigned level = surf->u.tex.level;
assert(surf->u.tex.first_layer == 0);
- if (rsrc->layout != PAN_TILED)
+ if (rsrc->layout != MALI_TEXTURE_TILED)
unreachable("Invalid render layout.");
fb->depth_buffer = rsrc->bo->gpu + rsrc->slices[level].offset;