Direct use of cpsr.el should be discouraged: it should be used when
in AArch64 only; when in AArch32 it won't return the matching EL.
Eg: when in Supervisor Mode (EL1), CPSR.M<3,0> (mode) is 0b0011,
and cpsr.el will return 0 (EL0)
Change-Id: I5504bd1f59980f79b2607cce435ea09245de12e5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20249
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
/*
- * Copyright (c) 2010, 2012-2013, 2016-2018 ARM Limited
+ * Copyright (c) 2010, 2012-2013, 2016-2019 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
static inline ExceptionLevel
currEL(ThreadContext *tc)
{
- CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
- return (ExceptionLevel) (uint8_t) cpsr.el;
+ return opModeToEL(currOpMode(tc));
}
/**