(shifts): Use reg_or_6bit_operand for shift counts.

From-SVN: r5090

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index f545e6392887d26f3d1f03fb2db74b6aed307062..f88da08ad791b9bcc08186579f9943d17e2fd03b 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -652,7 +652,7 @@
 (define_insn "ashldi3"
   [(set (match_operand:DI 0 "register_operand" "=r,r")
        (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ,rJ")
-                  (match_operand:DI 2 "reg_or_8bit_operand" "P,rI")))]
+                  (match_operand:DI 2 "reg_or_6bit_operand" "P,rI")))]
   ""
   "*
 {
@@ -695,14 +695,14 @@
 (define_insn "lshrdi3"
   [(set (match_operand:DI 0 "register_operand" "=r")
        (lshiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
-                    (match_operand:DI 2 "reg_or_8bit_operand" "rI")))]
+                    (match_operand:DI 2 "reg_or_6bit_operand" "rI")))]
   ""
   "srl %r1,%2,%0")
 
 (define_insn "ashrdi3"
   [(set (match_operand:DI 0 "register_operand" "=r")
        (ashiftrt:DI (match_operand:DI 1 "reg_or_0_operand" "rJ")
-                    (match_operand:DI 2 "reg_or_8bit_operand" "rI")))]
+                    (match_operand:DI 2 "reg_or_6bit_operand" "rI")))]
   ""
   "sra %r1,%2,%0")