-This is release 2.0_beta (patch 1) of the M5 simulator.
+This is release 2.0_beta4 of the M5 simulator.
For detailed information about building the simulator and getting
started please refer to http://www.m5sim.org.
- src: source code of the m5 simulator
- tests: regression tests
- ext: less-common external packages needed to build m5
- - system/alpha: source for Alpha console and PALcode
To run full-system simulations, you will need compiled console,
PALcode, and kernel binaries and one or more disk images. These files
Tru64 version of Unix. We are able to distribute Linux and FreeBSD
bootdisks, but we are unable to distribute bootable disk images of
Tru64 Unix. If you have a Tru64 license and are interested in
-obtaining disk images, contact us at m5-dev@eecs.umich.edu.
+obtaining disk images, contact us at m5-users@m5sim.org
Outstanding issues for 2.0 release:
--------------------
-1. Fix multi-level coherence/dma issues
-2. Fix O3 CPU bug in SE 40.perlbmk fails
-3. Fix O3 processing nacks/coherence messages
-4. Better statistics for the caches.
-5. Clean up more SimObject parameter stuff
-6. Checkpoint/switchover testing
-7. FS mode doesn't work under Cygwin
-8. memtest regression crashes under Cygwin
-9. Make repository public
-10. Testing
-11. Validation
-12. Testing
+1. Fix O3 CPU bug in SE 40.perlbmk fails
+2. Fix O3 processing nacks/coherence messages
+3. Better statistics for the caches.
+4. FS mode doesn't work under Cygwin
+5. memtest regression crashes under Cygwin
+6. Make repository public
+7. Testing
+8. Validation
+9. Testing
+
+Nov XX, 2007: m5_2.0_beta4
+--------------------
+New Features
+1. New cache
+2. Ability to include compiled code with EXTRAS=
+3. Python creation of params structures for initialization
+4. Ability to remotely debug in SE
+
+Bug fixes:
+1. Fix SE serialization
+2. SPARC_FS booting with TimingSimpleCPU
+3. Rename cycles() to ticks()
+4. Various SPARC ISA fixes
+5. Draining code for checkpointing
+6. Various performance improvements
May 16, 2007: m5_2.0_beta3
--------------------