2005-07-06 H.J. Lu <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add sse3.

	* config/tc-i386.h (CpuSSE3): Renamed from ...
	(CpuPNI): This. Defined as CpuSSE3.

	* doc/c-i386.texi: Document .sse3.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 68874ba92e923871508833e52cb5f04af489f377..bc81e200d35e68861d5e844ca506f18644138666 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2005-07-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (cpu_arch): Add sse3.
+
+       * config/tc-i386.h (CpuSSE3): Renamed from ...
+       (CpuPNI): This. Defined as CpuSSE3.
+
+       * doc/c-i386.texi: Document .sse3.
+
 2005-07-06  Jan Beulich  <jbeulich@novell.com>
 
        * config/tc-ia64.c (nop): Use zero for L-unit pseudo-nop.

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 9f9b23a1f95cfed7155731f18ad1b87985e9e7be..4b571942a096d9aee9bb16d8860896c238e17ac4 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -433,6 +433,7 @@ static const arch_entry cpu_arch[] = {
   {".mmx",     CpuMMX },
   {".sse",     CpuMMX|CpuMMX2|CpuSSE },
   {".sse2",    CpuMMX|CpuMMX2|CpuSSE|CpuSSE2 },
+  {".sse3",    CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3 },
   {".3dnow",   CpuMMX|Cpu3dnow },
   {".3dnowa",  CpuMMX|CpuMMX2|Cpu3dnow|Cpu3dnowA },
   {".padlock", CpuPadLock },

diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
index e4359fe47943ac43ee503a47d112c3e79f6e9a18..e545397d578c224191d543bf005bd2ba1fb8fd02 100644 (file)
--- a/gas/config/tc-i386.h
+++ b/gas/config/tc-i386.h
@@ -182,7 +182,8 @@ typedef struct
 #define CpuSSE2               0x4000   /* Streaming SIMD extensions 2 required */
 #define Cpu3dnow       0x8000  /* 3dnow! support required */
 #define Cpu3dnowA     0x10000  /* 3dnow!Extensions support required */
-#define CpuPNI       0x20000   /* Prescott New Instructions required */
+#define CpuSSE3              0x20000   /* Streaming SIMD extensions 3 required */
+#define CpuPNI       CpuSSE3   /* Prescott New Instructions required */
 #define CpuPadLock    0x40000  /* VIA PadLock required */
 #define CpuSVME              0x80000   /* AMD Secure Virtual Machine Ext-s required */
 

diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 044218417de00788a2ad8098f2b261006019c5f2..678dfe34deb3d7c14b1af43d7699e0904b8f3e44 100644 (file)
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -701,7 +701,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{i486} @tab @samp{i586} @tab @samp{i686} @tab @samp{pentium}
 @item @samp{pentiumpro} @tab @samp{pentiumii} @tab @samp{pentiumiii} @tab @samp{pentium4}
 @item @samp{k6} @tab @samp{athlon} @samp{sledgehammer}
-@item @samp{.mmx} @samp{.sse} @samp{.sse2} @samp{.3dnow}
+@item @samp{.mmx} @samp{.sse} @samp{.sse2} @samp{.sse3} @samp{.3dnow}
 @end multitable
 
 Apart from the warning, there are only two other effects on