[PATCH, GCC/ARM] Fix MVE scalar shift tests
authorMihail Ionescu <mihail.ionescu@arm.com>
Fri, 21 Feb 2020 15:21:23 +0000 (15:21 +0000)
committerMihail Ionescu <mihail.ionescu@arm.com>
Fri, 21 Feb 2020 15:21:23 +0000 (15:21 +0000)
*** gcc/ChangeLog ***

2020-02-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>

* config/arm/arm.md: Prevent scalar shifts from being
used when big endian is enabled.

*** gcc/testsuite/ChangeLog ***

2020-02-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>

* gcc.target/arm/armv8_1m-shift-imm-1.c: Add MVE target checks.
* gcc.target/arm/armv8_1m-shift-reg-1.c: Likewise.
* lib/target-supports.exp
(check_effective_target_arm_v8_1m_mve_ok_nocache): New.
(check_effective_target_arm_v8_1m_mve_ok): New.
(add_options_for_v8_1m_mve): New.

gcc/ChangeLog
gcc/config/arm/arm.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/arm/armv8_1m-shift-imm-1.c
gcc/testsuite/gcc.target/arm/armv8_1m-shift-reg-1.c
gcc/testsuite/lib/target-supports.exp

index 85630f3613f3398bb5e75e39b9cb1b973ba20128..3d4d799ed5d14e83677e6a2ebec5dc21c6d9b616 100644 (file)
@@ -1,3 +1,8 @@
+2020-02-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
+
+       * config/arm/arm.md: Prevent scalar shifts from being used when big
+       endian is enabled.
+
 2020-02-21  Jan Hubicka  <hubicka@ucw.cz>
            Richard Biener  <rguenther@suse.de>
 
index ab277996462cbb99b4338144ca3f87d75f9fe0ce..951596217ad2505d1e6232c2e592db595245bf65 100644 (file)
                    (match_operand:SI 2 "reg_or_int_operand")))]
   "TARGET_32BIT"
   "
-  if (TARGET_HAVE_MVE)
+  if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN)
     {
       if (!reg_or_int_operand (operands[2], SImode))
         operands[2] = force_reg (SImode, operands[2]);
   "TARGET_32BIT"
   "
   /* Armv8.1-M Mainline double shifts are not expanded.  */
-  if (TARGET_HAVE_MVE
+  if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN
       && arm_reg_or_long_shift_imm (operands[2], GET_MODE (operands[2])))
     {
       if (!reg_overlap_mentioned_p(operands[0], operands[1]))
   "TARGET_32BIT"
   "
   /* Armv8.1-M Mainline double shifts are not expanded.  */
-  if (TARGET_HAVE_MVE
+  if (TARGET_HAVE_MVE && !BYTES_BIG_ENDIAN
     && long_shift_imm (operands[2], GET_MODE (operands[2])))
     {
       if (!reg_overlap_mentioned_p(operands[0], operands[1]))
index 5f3d619c0b2a1d2681826c419a74868b03eb5158..02fa22ef23cd8323481d2c8d0309dec45ab43638 100644 (file)
@@ -1,3 +1,12 @@
+2020-02-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>
+
+       * gcc.target/arm/armv8_1m-shift-imm-1.c: Add MVE target checks.
+       * gcc.target/arm/armv8_1m-shift-reg-1.c: Likewise.
+       * lib/target-supports.exp
+       (check_effective_target_arm_v8_1m_mve_ok_nocache): New.
+       (check_effective_target_arm_v8_1m_mve_ok): New.
+       (add_options_for_v8_1m_mve): New.
+
 2020-02-21  Uroš Bizjak  <ubizjak@gmail.com>
 
        * gcc.dg/vect/vect-epilogues.c (scan-tree-dump): Require
index 5ffa3769e6ba42466242d3038857734e87b2f1fc..883fbb092b18422e9109e3e87abab22f1c602fdb 100644 (file)
@@ -1,5 +1,7 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=armv8.1-m.main+mve -mfloat-abi=softfp" } */
+/* { dg-options "-O2 -mfloat-abi=softfp -mlittle-endian" } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
 
 long long longval1;
 long long unsigned longval2;
index a97e9d687ef66e9642dd1d735125c8ee941fb151..e125ff83c222fcf4cd5d929714ae118387b77273 100644 (file)
@@ -1,5 +1,7 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=armv8.1-m.main+mve -mfloat-abi=softfp" } */
+/* { dg-options "-O2 -mfloat-abi=softfp -mlittle-endian" } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
 
 long long longval2;
 int intval2;
index ec4623158605a79b9685b4313d889dcc08d46fe7..9592c539c11634f580357d3ebbd02cdeb1da1b3a 100644 (file)
@@ -4828,6 +4828,48 @@ proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
     return 0;
 }
 
+# Return 1 if the target supports ARMv8.1-M MVE
+# instructions, 0 otherwise.  The test is valid for ARM.
+# Record the command line options needed.
+
+proc check_effective_target_arm_v8_1m_mve_ok_nocache { } {
+    global et_arm_v8_1m_mve_flags
+    set et_arm_v8_1m_mve_flags ""
+
+    if { ![istarget arm*-*-*] } {
+        return 0;
+    }
+
+    # Iterate through sets of options to find the compiler flags that
+    # need to be added to the -march option.
+    foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
+        if { [check_no_compiler_messages_nocache \
+                  arm_v8_1m_mve_ok object {
+            #if !defined (__ARM_FEATURE_MVE)
+            #error "__ARM_FEATURE_MVE not defined"
+            #endif
+        } "$flags -mthumb"] } {
+            set et_arm_v8_1m_mve_flags "$flags -mthumb"
+            return 1
+        }
+    }
+
+    return 0;
+}
+
+proc check_effective_target_arm_v8_1m_mve_ok { } {
+    return [check_cached_effective_target arm_v8_1m_mve_ok \
+                check_effective_target_arm_v8_1m_mve_ok_nocache]
+}
+
+proc add_options_for_arm_v8_1m_mve { flags } {
+    if { ! [check_effective_target_arm_v8_1m_mve_ok] } {
+        return "$flags"
+    }
+    global et_arm_v8_1m_mve_flags
+    return "$flags $et_arm_v8_1m_mve_flags"
+}
+
 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
     return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
                 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]