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Check for additional signals in phase injector at t=0
author
Jean THOMAS
<git0@pub.jeanthomas.me>
Fri, 3 Jul 2020 12:51:10 +0000
(14:51 +0200)
committer
Jean THOMAS
<git0@pub.jeanthomas.me>
Fri, 3 Jul 2020 12:51:10 +0000
(14:51 +0200)
gram/test/test_dfii.py
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diff --git
a/gram/test/test_dfii.py
b/gram/test/test_dfii.py
index 0cf727e88e4ff37b26180f869e984b841725d960..27543f7308bf0f945950cfdac88922fd70a58fa0 100644
(file)
--- a/
gram/test/test_dfii.py
+++ b/
gram/test/test_dfii.py
@@
-51,6
+51,8
@@
class PhaseInjectorTestCase(FHDLTestCase):
self.assertTrue((yield dfi.phases[0].we_n))
self.assertTrue((yield dfi.phases[0].act_n))
self.assertFalse((yield dfi.phases[0].wrdata_mask))
+ self.assertFalse((yield dfi.phases[0].rddata_en))
+ self.assertFalse((yield dfi.phases[0].wrdata_en))
runSimulation(m, process, "test_phaseinjector.vcd")