x32: Update gcc.target/i386/builtin_thread_pointer.c

Update gcc.target/i386/builtin_thread_pointer.c for x32.  For

int
foo3 (int i)
{
  int* p = (int*) __builtin_thread_pointer ();
  return p[i];
}

we can't generate:

	movl	%fs:0(,%edi,4), %eax
	ret

for x32 since the address of %fs:0(,%edi,4) is %fs + zero-extended to 64
bits of 0(,%edi,4).  Instead, we generate:

	movl	%fs:0, %eax
	movl	(%eax,%edi,4), %eax

	PR target/96955
	* gcc.target/i386/builtin_thread_pointer.c: Update scan-assembler
	for x32.

diff --git a/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c b/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c
index dce314881178160da683a8e8a4a898aa5d143cb3..16a7ca49b9906d4afd5538653f5f3a7ee9fb74a6 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c
+++ b/gcc/testsuite/gcc.target/i386/builtin_thread_pointer.c
@@ -25,4 +25,6 @@ foo3 (int i)
   return p[i];
 }
 
-/* { dg-final { scan-assembler "movl\[ \t\]*%\[fg\]s:0\\(,%\[a-z0-9\]*,4\\), %eax" } }  */
+/* { dg-final { scan-assembler "movl\[ \t\]*%\[fg\]s:0\\(,%\[a-z0-9\]*,4\\), %eax" { target { ! x32 } } } }  */
+/* { dg-final { scan-assembler-not "movl\[ \t\]*%fs:0\\(,%\[a-z0-9\]*,4\\), %eax" { target x32 } } }  */
+/* { dg-final { scan-assembler "movl\[ \t\]*\\(%eax,%edi,4\\), %eax" { target x32 } } }  */