freedreno/a6xx: add helper for various CP_EVENT_WRITE

Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.h b/src/gallium/drivers/freedreno/a6xx/fd6_context.h
index 819c55c89e5a33c6b893558401dfe959ef3f89ee..30cc26001cdc73a098d388cc18223a1f104f2a51 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.h
@@ -71,6 +71,7 @@ struct fd6_context {
         * synchronize when the CP is running far ahead)
         */
        struct fd_bo *blit_mem;
+       uint32_t seqno;
 
        struct u_upload_mgr *border_color_uploader;
        struct pipe_resource *border_color_buf;

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index 69b686aa6b0f5ecb053adc683f28dee739f80f6f..16985cb6e3397723922ae881264aaea5d3f20341 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -268,8 +268,7 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
 
                for (unsigned i = 0; i < PIPE_MAX_SO_BUFFERS; i++) {
                        if (emit.streamout_mask & (1 << i)) {
-                               OUT_PKT7(ring, CP_EVENT_WRITE, 1);
-                               OUT_RING(ring, FLUSH_SO_0 + i);
+                               fd6_event_write(ctx->batch, ring, FLUSH_SO_0 + i, false);
                        }
                }
        }
@@ -532,7 +531,7 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
                        OUT_RING(ring, uc.ui[2]);
                        OUT_RING(ring, uc.ui[3]);
 
-                       fd6_emit_blit(ctx, ring);
+                       fd6_emit_blit(ctx->batch, ring);
                }
        }
 
@@ -566,7 +565,7 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
                OUT_PKT4(ring, REG_A6XX_RB_BLIT_CLEAR_COLOR_DW0, 1);
                OUT_RING(ring, clear);
 
-               fd6_emit_blit(ctx, ring);
+               fd6_emit_blit(ctx->batch, ring);
 
 #if 0
                if (pfb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) {

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
index 45e9f2ddc51a7c0e4e7140c4b53b988a1c331a39..bfff7b302664f6c73c5d2671d8fca2e1a76cfdf1 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
@@ -92,30 +92,31 @@ fd6_emit_get_fp(struct fd6_emit *emit)
 }
 
 static inline void
-fd6_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring)
+fd6_event_write(struct fd_batch *batch, struct fd_ringbuffer *ring,
+               enum vgt_event_type evt, bool timestamp)
 {
        fd_reset_wfi(batch);
-#if 0
-       OUT_PKT4(ring, REG_A6XX_UCHE_CACHE_INVALIDATE_MIN_LO, 5);
-       OUT_RING(ring, 0x00000000);   /* UCHE_CACHE_INVALIDATE_MIN_LO */
-       OUT_RING(ring, 0x00000000);   /* UCHE_CACHE_INVALIDATE_MIN_HI */
-       OUT_RING(ring, 0x00000000);   /* UCHE_CACHE_INVALIDATE_MAX_LO */
-       OUT_RING(ring, 0x00000000);   /* UCHE_CACHE_INVALIDATE_MAX_HI */
-       OUT_RING(ring, 0x00000012);   /* UCHE_CACHE_INVALIDATE */
-       fd_wfi(batch, ring);
-#else
-       DBG("fd6_cache_flush stub");
-#endif
+
+       OUT_PKT7(ring, CP_EVENT_WRITE, timestamp ? 4 : 1);
+       OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(evt));
+       if (timestamp) {
+               struct fd6_context *fd6_ctx = fd6_context(batch->ctx);
+               OUT_RELOCW(ring, fd6_ctx->blit_mem, 0, 0, 0);  /* ADDR_LO/HI */
+               OUT_RING(ring, ++fd6_ctx->seqno);
+       }
+}
+
+static inline void
+fd6_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring)
+{
+       fd6_event_write(batch, ring, 0x31, false);
 }
 
 static inline void
-fd6_emit_blit(struct fd_context *ctx, struct fd_ringbuffer *ring)
+fd6_emit_blit(struct fd_batch *batch, struct fd_ringbuffer *ring)
 {
        emit_marker6(ring, 7);
-
-       OUT_PKT7(ring, CP_EVENT_WRITE, 1);
-       OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(BLIT));
-
+       fd6_event_write(batch, ring, BLIT, false);
        emit_marker6(ring, 7);
 }
 

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index 1045605f1ac9085a0e7eb4b9af34fb473f0d38be..d82b71954b468e318c117363ff667b20d4b27c9e 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -446,8 +446,7 @@ fd6_emit_tile_init(struct fd_batch *batch)
 
        fd6_emit_lrz_flush(ring);
 
-       OUT_PKT7(ring, CP_EVENT_WRITE, 1);
-       OUT_RING(ring, 0x31); /* vertex cache invalidate? */
+       fd6_cache_flush(batch, ring);
 
        OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
        OUT_RING(ring, 0x0);
@@ -623,7 +622,7 @@ emit_blit(struct fd_batch *batch, uint32_t base,
        OUT_PKT4(ring, REG_A6XX_RB_BLIT_BASE_GMEM, 1);
        OUT_RING(ring, base);
 
-       fd6_emit_blit(batch->ctx, ring);
+       fd6_emit_blit(batch, ring);
 }
 
 static void
@@ -794,7 +793,7 @@ fd6_emit_tile_fini(struct fd_batch *batch)
 
        fd6_emit_lrz_flush(ring);
 
-       fd6_cache_flush(batch, ring);
+       fd6_event_write(batch, ring, CACHE_FLUSH_TS, true);
 }
 
 static void
@@ -815,11 +814,8 @@ fd6_emit_sysmem_prep(struct fd_batch *batch)
        OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
        OUT_RING(ring, 0x0);
 
-       OUT_PKT7(ring, CP_EVENT_WRITE, 1);
-       OUT_RING(ring, PC_CCU_INVALIDATE_COLOR);
-
-       OUT_PKT7(ring, CP_EVENT_WRITE, 1);
-       OUT_RING(ring, 0x31); /* vertex cache invalidate? */
+       fd6_event_write(batch, ring, PC_CCU_INVALIDATE_COLOR, false);
+       fd6_cache_flush(batch, ring);
 
 #if 0
        OUT_PKT4(ring, REG_A6XX_PC_POWER_CNTL, 1);
@@ -856,7 +852,6 @@ fd6_emit_sysmem_prep(struct fd_batch *batch)
 static void
 fd6_emit_sysmem_fini(struct fd_batch *batch)
 {
-       struct fd6_context *fd6_ctx = fd6_context(batch->ctx);
        struct fd_ringbuffer *ring = batch->gmem;
 
        OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
@@ -864,10 +859,7 @@ fd6_emit_sysmem_fini(struct fd_batch *batch)
 
        fd6_emit_lrz_flush(ring);
 
-       OUT_PKT7(ring, CP_EVENT_WRITE, 4);
-       OUT_RING(ring, UNK_1D);
-       OUT_RELOCW(ring, fd6_ctx->blit_mem, 0, 0, 0);  /* ADDR_LO/HI */
-       OUT_RING(ring, 0x00000000);
+       fd6_event_write(batch, ring, UNK_1D, true);
 }
 
 void

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_query.c b/src/gallium/drivers/freedreno/a6xx/fd6_query.c
index 1f9dce74fe6c07984bd5fcfc68a81a7b0414e85c..c85854d5dceda1741f38ff13ebdc39b3812b4613 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_query.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_query.c
@@ -31,6 +31,7 @@
 #include "freedreno_resource.h"
 
 #include "fd6_context.h"
+#include "fd6_emit.h"
 #include "fd6_format.h"
 #include "fd6_query.h"
 
@@ -63,9 +64,7 @@ occlusion_resume(struct fd_acc_query *aq, struct fd_batch *batch)
        OUT_PKT4(ring, REG_A6XX_RB_SAMPLE_COUNT_ADDR_LO, 2);
        OUT_RELOCW(ring, query_sample(aq, start));
 
-       OUT_PKT7(ring, CP_EVENT_WRITE, 1);
-       OUT_RING(ring, ZPASS_DONE);
-       fd_reset_wfi(batch);
+       fd6_event_write(batch, ring, ZPASS_DONE, false);
 
        fd6_context(batch->ctx)->samples_passed_queries++;
 }