* recog.c (asm_operand_ok): Allow float CONST_VECTORs for 'F'.
(constrain_operands): Likewise.
* regclass.c (record_reg_classes): Likewise.
* reload.c (find_reloads): Likewise.
* doc/md.texi: Likewise.
From-SVN: r55689
-Tue Jul 23 21:02:16 2002 J"orn Rennecke <joern.rennecke@superh.com>
+Tue Jul 23 21:49:24 2002 J"orn Rennecke <joern.rennecke@superh.com>
+
+ * recog.c (asm_operand_ok): Allow float CONST_VECTORs for 'F'.
+ (constrain_operands): Likewise.
+ * regclass.c (record_reg_classes): Likewise.
+ * reload.c (find_reloads): Likewise.
+ * doc/md.texi: Likewise.
* reload.c (find_reloads_toplev): Use simplify_gen_subreg.
* simplify-rtx.c (simplify_subreg): When converting to a non-int
@cindex @samp{F} in constraint
@item @samp{F}
-An immediate floating operand (expression code @code{const_double}) is
-allowed.
+An immediate floating operand (expression code @code{const_double} or
+@code{const_vector}) is allowed.
@cindex @samp{G} in constraint
@cindex @samp{H} in constraint
case 'E':
case 'F':
- if (GET_CODE (op) == CONST_DOUBLE)
+ if (GET_CODE (op) == CONST_DOUBLE
+ || (GET_CODE (op) == CONST_VECTOR
+ && GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_FLOAT))
return 1;
break;
case 'E':
case 'F':
- if (GET_CODE (op) == CONST_DOUBLE)
+ if (GET_CODE (op) == CONST_DOUBLE
+ || (GET_CODE (op) == CONST_VECTOR
+ && GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_FLOAT))
win = 1;
break;
case 'E':
case 'F':
- if (GET_CODE (op) == CONST_DOUBLE)
+ if (GET_CODE (op) == CONST_DOUBLE
+ || (GET_CODE (op) == CONST_VECTOR
+ && (GET_MODE_CLASS (GET_MODE (op))
+ == MODE_VECTOR_FLOAT)))
win = 1;
break;
case 'E':
case 'F':
- if (GET_CODE (operand) == CONST_DOUBLE)
+ if (GET_CODE (operand) == CONST_DOUBLE
+ || (GET_CODE (operand) == CONST_VECTOR
+ && (GET_MODE_CLASS (GET_MODE (operand))
+ == MODE_VECTOR_FLOAT)))
win = 1;
break;