i965: Drop dead Gen8+ code from Gen7/sometimes-HSW driver hooks.

These driver hooks are not used when MI_MATH and MI_LOAD_REGISTER_REG
are supported, which Gen8+ can always do.  So this code is dead.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c
index e6b79ed234293dfd22e6cf24d639a2d9aafc8aa2..50631610e5114838c0864ec72690ef88afdb9854 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c
@@ -490,13 +490,11 @@ gen7_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
    struct brw_transform_feedback_object *brw_obj =
       (struct brw_transform_feedback_object *) obj;
 
+   assert(brw->gen == 7);
+
    /* Reset the SO buffer offsets to 0. */
-   if (brw->gen >= 8) {
-      brw_obj->zero_offsets = true;
-   } else {
-      intel_batchbuffer_flush(brw);
-      brw->batch.needs_sol_reset = true;
-   }
+   intel_batchbuffer_flush(brw);
+   brw->batch.needs_sol_reset = true;
 
    /* We're about to lose the information needed to compute the number of
     * vertices written during the last Begin/EndTransformFeedback section,
@@ -552,17 +550,17 @@ gen7_pause_transform_feedback(struct gl_context *ctx,
    /* Flush any drawing so that the counters have the right values. */
    brw_emit_mi_flush(brw);
 
+   assert(brw->gen == 7);
+
    /* Save the SOL buffer offset register values. */
-   if (brw->gen < 8) {
-      for (int i = 0; i < 4; i++) {
-         BEGIN_BATCH(3);
-         OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2));
-         OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
-         OUT_RELOC(brw_obj->offset_bo,
-                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
-                   i * sizeof(uint32_t));
-         ADVANCE_BATCH();
-      }
+   for (int i = 0; i < 4; i++) {
+      BEGIN_BATCH(3);
+      OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2));
+      OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
+      OUT_RELOC(brw_obj->offset_bo,
+                I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
+                i * sizeof(uint32_t));
+      ADVANCE_BATCH();
    }
 
    /* Store the temporary ending value of the SO_NUM_PRIMS_WRITTEN counters.
@@ -581,17 +579,17 @@ gen7_resume_transform_feedback(struct gl_context *ctx,
    struct brw_transform_feedback_object *brw_obj =
       (struct brw_transform_feedback_object *) obj;
 
+   assert(brw->gen == 7);
+
    /* Reload the SOL buffer offset registers. */
-   if (brw->gen < 8) {
-      for (int i = 0; i < 4; i++) {
-         BEGIN_BATCH(3);
-         OUT_BATCH(GEN7_MI_LOAD_REGISTER_MEM | (3 - 2));
-         OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
-         OUT_RELOC(brw_obj->offset_bo,
-                   I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
-                   i * sizeof(uint32_t));
-         ADVANCE_BATCH();
-      }
+   for (int i = 0; i < 4; i++) {
+      BEGIN_BATCH(3);
+      OUT_BATCH(GEN7_MI_LOAD_REGISTER_MEM | (3 - 2));
+      OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
+      OUT_RELOC(brw_obj->offset_bo,
+                I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
+                i * sizeof(uint32_t));
+      ADVANCE_BATCH();
    }
 
    /* Store the new starting value of the SO_NUM_PRIMS_WRITTEN counters. */