radv: add RADV_DEBUG=checkir

This allows to run the LLVM verifier pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_debug.h b/src/amd/vulkan/radv_debug.h
index 762b3382194667219cffa9960217057bf28b01ff..1e71349509e76dc966a1430eddb50a31ca7a939c 100644 (file)
--- a/src/amd/vulkan/radv_debug.h
+++ b/src/amd/vulkan/radv_debug.h
@@ -48,6 +48,7 @@ enum {
        RADV_DEBUG_INFO              = 0x40000,
        RADV_DEBUG_ERRORS            = 0x80000,
        RADV_DEBUG_STARTUP           = 0x100000,
+       RADV_DEBUG_CHECKIR           = 0x200000,
 };
 
 enum {

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 5936b43093e1603586154a1aec829b761795df6b..1ffbe75ef6bec78597db18fd089dc5fa91bde159 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -410,6 +410,7 @@ static const struct debug_control radv_debug_options[] = {
        {"info", RADV_DEBUG_INFO},
        {"errors", RADV_DEBUG_ERRORS},
        {"startup", RADV_DEBUG_STARTUP},
+       {"checkir", RADV_DEBUG_CHECKIR},
        {NULL, 0}
 };
 

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index a56f017e25c7e3869f7ec9f9f92c29bf4b90f476..5168c9d554aa8e661e8c515a7455de2448dc8837 100644 (file)
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -2967,13 +2967,17 @@ handle_shader_outputs_post(struct ac_shader_abi *abi, unsigned max_outputs,
        }
 }
 
-static void ac_llvm_finalize_module(struct radv_shader_context *ctx)
+static void ac_llvm_finalize_module(struct radv_shader_context *ctx,
+                                   const struct radv_nir_compiler_options *options)
 {
        LLVMPassManagerRef passmgr;
        /* Create the pass manager */
        passmgr = LLVMCreateFunctionPassManagerForModule(
                                                        ctx->ac.module);
 
+       if (options->check_ir)
+               LLVMAddVerifierPass(passmgr);
+
        /* This pass should eliminate all the load and store instructions */
        LLVMAddPromoteMemoryToRegisterPass(passmgr);
 
@@ -3299,7 +3303,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
        if (options->dump_preoptir)
                ac_dump_module(ctx.ac.module);
 
-       ac_llvm_finalize_module(&ctx);
+       ac_llvm_finalize_module(&ctx, options);
 
        if (shader_count == 1)
                ac_nir_eliminate_const_vs_outputs(&ctx);
@@ -3617,7 +3621,7 @@ radv_compile_gs_copy_shader(LLVMTargetMachineRef tm,
 
        LLVMBuildRetVoid(ctx.ac.builder);
 
-       ac_llvm_finalize_module(&ctx);
+       ac_llvm_finalize_module(&ctx, options);
 
        ac_compile_llvm_module(tm, ctx.ac.module, binary, config, shader_info,
                               MESA_SHADER_VERTEX, options);

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 76790a19047a86abdad5668690675f0679f1f572..a68e1d0254586d9d2a99fe3a7403858a1fa9f48c 100644 (file)
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -571,6 +571,7 @@ shader_variant_create(struct radv_device *device,
        options->dump_preoptir = options->dump_shader &&
                                 device->instance->debug_flags & RADV_DEBUG_PREOPTIR;
        options->record_llvm_ir = device->keep_shader_info;
+       options->check_ir = device->instance->debug_flags & RADV_DEBUG_CHECKIR;
        options->tess_offchip_block_dw_size = device->tess_offchip_block_dw_size;
        options->address32_hi = device->physical_device->rad_info.address32_hi;
 

diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 5b2284efcfdd8311e53083fe95de9d967d1963fd..e95bbfca89457d9dce74e6770625229a549e9a8b 100644 (file)
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -119,6 +119,7 @@ struct radv_nir_compiler_options {
        bool dump_shader;
        bool dump_preoptir;
        bool record_llvm_ir;
+       bool check_ir;
        enum radeon_family family;
        enum chip_class chip_class;
        uint32_t tess_offchip_block_dw_size;